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| author | Paul Menzel <paulepanter@users.sourceforge.net> | 2013-05-08 15:09:45 +0200 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-05-10 00:36:22 +0200 |
| commit | bed88d65b2a142be1a0f278eef8dfbb64859077e (patch) | |
| tree | b72f15b1b4a3aa12846721226054ba0a6136ee10 /src/northbridge | |
| parent | 3f5f6d8368031710d4f5847ff285812fcde54009 (diff) | |
| download | coreboot-bed88d65b2a142be1a0f278eef8dfbb64859077e.tar.xz | |
northbridge/intel/i5000/udelay.c: Remove unused header `console.h`
Nothing from the header `console.h` is needed in `udelay.c`, so do
not include it.
This header was included since commit
»Add Intel i5000 Memory Controller Hub« (17670866) [1].
[1] http://review.coreboot.org/491
Change-Id: Ie136a1b862b55c9471f9293ed616ce27a1d01a50
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3218
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/i5000/udelay.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/i5000/udelay.c b/src/northbridge/intel/i5000/udelay.c index e462bbcdf4..ce4c7b360e 100644 --- a/src/northbridge/intel/i5000/udelay.c +++ b/src/northbridge/intel/i5000/udelay.c @@ -22,7 +22,7 @@ #include <cpu/x86/tsc.h> #include <cpu/x86/msr.h> #include <cpu/intel/speedstep.h> -#include <console/console.h> + /** * Intel Core(tm) cpus always run the TSC at the maximum possible CPU clock */ |