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authorVladimir Serbinenko <phcoder@gmail.com>2014-11-09 13:17:39 +0100
committerVladimir Serbinenko <phcoder@gmail.com>2014-11-15 20:47:33 +0100
commitbf8722aac82d926380f84530ec92d10291693260 (patch)
tree0bc6f0f64d50319aebf83a5c8417d892ec42edb5 /src/northbridge
parent741165740f471057d2d66faf1aaf858289b2448e (diff)
downloadcoreboot-bf8722aac82d926380f84530ec92d10291693260.tar.xz
Make set_bios_reset into normal rather than weak function
Change-Id: I2efa254537f83fe689fd07fe6ec80f0446ad5a9d Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7370 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/amdfam10/reset_test.c4
-rw-r--r--src/northbridge/amd/amdk8/reset_test.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/northbridge/amd/amdfam10/reset_test.c b/src/northbridge/amd/amdfam10/reset_test.c
index de7949ef6a..b4a44ea33e 100644
--- a/src/northbridge/amd/amdfam10/reset_test.c
+++ b/src/northbridge/amd/amdfam10/reset_test.c
@@ -83,8 +83,8 @@ static u32 warm_reset_detect(u8 nodeid)
return (htic & HTIC_ColdR_Detect) && !(htic & HTIC_BIOSR_Detect);
}
-void __attribute__ ((weak)) set_bios_reset(void);
-void __attribute__ ((weak)) set_bios_reset(void)
+void set_bios_reset(void);
+void set_bios_reset(void)
{
u32 nodes;
diff --git a/src/northbridge/amd/amdk8/reset_test.c b/src/northbridge/amd/amdk8/reset_test.c
index 8015290250..81da5920cb 100644
--- a/src/northbridge/amd/amdk8/reset_test.c
+++ b/src/northbridge/amd/amdk8/reset_test.c
@@ -44,8 +44,8 @@ static inline void distinguish_cpu_resets(unsigned nodeid)
pci_write_config32(device, HT_INIT_CONTROL, htic);
}
-void __attribute__ ((weak)) set_bios_reset(void);
-void __attribute__ ((weak)) set_bios_reset(void)
+void set_bios_reset(void);
+void set_bios_reset(void)
{
u32 htic;
htic = pci_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL);