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authorVagiz Trakhanov <rakkin@autistici.org>2017-09-28 15:01:06 +0000
committerNico Huber <nico.h@gmx.de>2017-10-16 20:24:44 +0000
commite200c1cf6f439658cc00024679b35fc46d772cad (patch)
tree9a742f4ebb19b31bcea3377791a9d935beb8616a /src/northbridge
parent1dd448c0cfe00208e068cdab6fc20f983c9df0c4 (diff)
downloadcoreboot-e200c1cf6f439658cc00024679b35fc46d772cad.tar.xz
sandybridge/acpi: remove unnessary check of PCI IDs
DRAM Controller is always 00.0. No need to check its PCI ID. Change-Id: I9c5f3e5658905e464491579f8da01aa6a03bd3b7 Signed-off-by: Vagiz Tarkhanov <rakkin@autistici.org> Reviewed-on: https://review.coreboot.org/21754 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/sandybridge/acpi.c6
-rw-r--r--src/northbridge/intel/sandybridge/sandybridge.h3
2 files changed, 2 insertions, 7 deletions
diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c
index 658000aa87..91ecac5956 100644
--- a/src/northbridge/intel/sandybridge/acpi.c
+++ b/src/northbridge/intel/sandybridge/acpi.c
@@ -26,14 +26,12 @@
unsigned long acpi_fill_mcfg(unsigned long current)
{
- device_t dev;
u32 pciexbar = 0;
u32 pciexbar_reg;
int max_buses;
- dev = dev_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_SB, 0);
- if (!dev)
- dev = dev_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_IB, 0);
+ struct device *const dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+
if (!dev)
return current;
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index 9d88c70544..dd1a58cbc3 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -201,9 +201,6 @@
#ifndef __ASSEMBLER__
static inline void barrier(void) { asm("" ::: "memory"); }
-#define PCI_DEVICE_ID_SB 0x0104
-#define PCI_DEVICE_ID_IB 0x0154
-
#ifdef __SMM__
void intel_sandybridge_finalize_smm(void);
#else /* !__SMM__ */