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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2018-04-18 10:11:59 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-20 13:03:54 +0000 |
| commit | e56189cfd1d90a2ca13650a9d21ff82cb79ccda8 (patch) | |
| tree | 0da4c1fec6bdb725e4065d4d687364ae5c63104d /src/northbridge | |
| parent | 6fcb9b00c8b7f820bb5ef81a83a24cd656654272 (diff) | |
| download | coreboot-e56189cfd1d90a2ca13650a9d21ff82cb79ccda8.tar.xz | |
pci: Move inline PCI functions to pci_ops.h
Move inline function where they belong to. Fixes compilation
on non x86 platforms.
Change-Id: Ia05391c43b8d501bd68df5654bcfb587f8786f71
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25720
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/agesa/family14/state_machine.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/fsp_sandybridge/finalize.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/finalize.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/nehalem/finalize.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/finalize.c | 1 |
5 files changed, 5 insertions, 0 deletions
diff --git a/src/northbridge/amd/agesa/family14/state_machine.c b/src/northbridge/amd/agesa/family14/state_machine.c index 025d94fffd..fd9e3d0eaa 100644 --- a/src/northbridge/amd/agesa/family14/state_machine.c +++ b/src/northbridge/amd/agesa/family14/state_machine.c @@ -20,6 +20,7 @@ #include <cbmem.h> #include <device/device.h> #include <device/pci_def.h> +#include <device/pci_ops.h> #include <halt.h> #include <reset.h> #include <smp/node.h> diff --git a/src/northbridge/intel/fsp_sandybridge/finalize.c b/src/northbridge/intel/fsp_sandybridge/finalize.c index 4ceb75688e..b02023db4b 100644 --- a/src/northbridge/intel/fsp_sandybridge/finalize.c +++ b/src/northbridge/intel/fsp_sandybridge/finalize.c @@ -16,6 +16,7 @@ #include <arch/io.h> #include <stdlib.h> +#include <device/pci_ops.h> #include "northbridge.h" #define PCI_DEV_SNB PCI_DEV(0, 0, 0) diff --git a/src/northbridge/intel/haswell/finalize.c b/src/northbridge/intel/haswell/finalize.c index 04f73566db..5f42518891 100644 --- a/src/northbridge/intel/haswell/finalize.c +++ b/src/northbridge/intel/haswell/finalize.c @@ -16,6 +16,7 @@ #include <arch/io.h> #include <stdlib.h> +#include <device/pci_ops.h> #include "haswell.h" #define PCI_DEV_HSW PCI_DEV(0, 0, 0) diff --git a/src/northbridge/intel/nehalem/finalize.c b/src/northbridge/intel/nehalem/finalize.c index 0b5cb74ce2..f90f93769f 100644 --- a/src/northbridge/intel/nehalem/finalize.c +++ b/src/northbridge/intel/nehalem/finalize.c @@ -16,6 +16,7 @@ #include <arch/io.h> #include <stdlib.h> +#include <device/pci_ops.h> #include "nehalem.h" #define PCI_DEV_SNB PCI_DEV(0, 0, 0) diff --git a/src/northbridge/intel/sandybridge/finalize.c b/src/northbridge/intel/sandybridge/finalize.c index 21bf9da332..3fb0aa6dee 100644 --- a/src/northbridge/intel/sandybridge/finalize.c +++ b/src/northbridge/intel/sandybridge/finalize.c @@ -16,6 +16,7 @@ #include <arch/io.h> #include <stdlib.h> +#include <device/pci_ops.h> #include "sandybridge.h" #define PCI_DEV_SNB PCI_DEV(0, 0, 0) |