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authorYinghai Lu <yinghai.lu at amd.com>2007-04-06 19:51:02 +0000
committerStefan Reinauer <stepan@openbios.org>2007-04-06 19:51:02 +0000
commita3cf00e4bab084a231cbd7cafab3c02342c400e0 (patch)
tree5bcd5dcf2d1c6640077279e55cf64818e7a30f47 /src/pc80
parent21332b80d09adac3e6bb54c92e2a5e19db86a784 (diff)
downloadcoreboot-a3cf00e4bab084a231cbd7cafab3c02342c400e0.tar.xz
two more directories from YhLu's mcp55 megapatch.
Signed-off-by: Yinghai Lu <yinghai.lu at amd.com> Signed-off-by: Ed Swierk <eswierk at arastra.com> Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ward Vandewege <ward at gnu.org> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2589 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/pc80')
-rw-r--r--src/pc80/serial.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/pc80/serial.c b/src/pc80/serial.c
index 475c9bccf5..f8005da277 100644
--- a/src/pc80/serial.c
+++ b/src/pc80/serial.c
@@ -24,7 +24,7 @@
#define UART_LCS TTYS0_LCS
-#if CONFIG_USE_INIT == 0
+#if CONFIG_USE_PRINTK_IN_CAR == 0
/* Data */
#define UART_RBR 0x00
@@ -92,6 +92,7 @@ static void uart_init(void)
outb(UART_LCS, TTYS0_BASE + UART_LCR);
}
#else
+#include "../lib/uart8250.c"
extern void uart8250_init(unsigned base_port, unsigned divisor, unsigned lcs);
static void uart_init(void)
{