diff options
| author | Stefan Reinauer <reinauer@chromium.org> | 2011-10-14 15:24:03 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2011-10-17 17:51:52 +0200 |
| commit | d87dfc0c389563e4bac3c2726adce4f4800aad06 (patch) | |
| tree | a414ca09c4f3286f010244e16be35d4057208a73 /src/pc80 | |
| parent | 1babddb202478c88813ee94911ee5576773e8d96 (diff) | |
| download | coreboot-d87dfc0c389563e4bac3c2726adce4f4800aad06.tar.xz | |
Fix our CMOS checksum algorithm so it matches what /dev/nvram expects
Our cmos checksum is inverted to what the Linux /dev/nvram device expects (and
BIOSes use). This makes it impossible to use /dev/nvram with coreboot. Fix it!
Change-Id: I239f7e3aca05d3691aee16490dd801df2ccaefd1
Signed-off-by: Vadim Bendebury <vbendeb@google.com>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/279
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/pc80')
| -rw-r--r-- | src/pc80/mc146818rtc.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/pc80/mc146818rtc.c b/src/pc80/mc146818rtc.c index f3bee9bdce..034957acf5 100644 --- a/src/pc80/mc146818rtc.c +++ b/src/pc80/mc146818rtc.c @@ -98,7 +98,6 @@ static void rtc_set_checksum(int range_start, int range_end, int cks_loc) for(i = range_start; i <= range_end; i++) { sum += cmos_read(i); } - sum = ~(sum & 0x0ffff); cmos_write(((sum >> 8) & 0x0ff), cks_loc); cmos_write(((sum >> 0) & 0x0ff), cks_loc+1); } |