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authorRichard Smith <smithbone@gmail.com>2006-04-01 04:10:44 +0000
committerRichard Smith <smithbone@gmail.com>2006-04-01 04:10:44 +0000
commitffb7d8a31ae899f611235cd0a7f3579d34cd8cde (patch)
tree100617ca726a7c8babc6d418496117e4e6f66277 /src/ram
parent4b539d78abaae60d0e9e71f53b2e4103b6f33a65 (diff)
downloadcoreboot-ffb7d8a31ae899f611235cd0a7f3579d34cd8cde.tar.xz
- Adds support for the Advantech eval board. Configuration was produced
on a SOM-DB2301 baseboard with a SOM-2354 cpu module. - Also does a slight tweak to the ram test code to make it more obvious when it fails. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2231 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/ram')
-rw-r--r--src/ram/ramtest.c15
1 files changed, 12 insertions, 3 deletions
diff --git a/src/ram/ramtest.c b/src/ram/ramtest.c
index 2ae5303e8e..6baa81f93d 100644
--- a/src/ram/ramtest.c
+++ b/src/ram/ramtest.c
@@ -69,17 +69,26 @@ static void ram_verify(unsigned long start, unsigned long stop)
value = read_phys(addr);
if (value != addr) {
/* Display address with error */
+ print_err("Fail: @0x");
print_err_hex32(addr);
- print_err_char(':');
+ print_err(" Read value=0x");
print_err_hex32(value);
print_err("\r\n");
i++;
- if(i>256) break;
+ if(i>256) {
+ print_debug("Aborting.\n\r");
+ break;
+ }
}
}
/* Display final address */
print_debug_hex32(addr);
- print_debug("\r\nDRAM verified\r\n");
+ if (i) {
+ print_debug("\r\nDRAM did _NOT_ verify!\r\n");
+ }
+ else {
+ print_debug("\r\nDRAM range verified.\r\n");
+ }
}