diff options
author | Joel Kitching <kitching@google.com> | 2018-11-15 16:48:53 +0800 |
---|---|---|
committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2018-11-28 18:32:59 +0000 |
commit | 2e690eeaf2c59070f74b01afb238c8a5208228f0 (patch) | |
tree | d83d2b153c93a74b29bc2eb326c120e98dfc24d1 /src/security/tpm/tss/tcg-1.2 | |
parent | e102c5d54b79543eee34cf19bdbab7b25ef9417e (diff) | |
download | coreboot-2e690eeaf2c59070f74b01afb238c8a5208228f0.tar.xz |
tss: implement tlcl_save_state
When an untrusted OS is running, we would like to use the Cr50
vendor-specific VENDOR_CC_TPM_MODE command to disable TPM.
Before doing this, we should save TPM state. Implement
tlcl_save_state for this purpose.
This needs to live in coreboot codebase since on S3 resume path,
depthcharge is not reached.
Implement the function in both tcg-1.2 and tcg-2.0 for
completeness.
BUG=b:70681930,b:118202153
TEST=hack a call to tlcl_save_state into coreboot on S3 resume
verify in AP console that it is called
Signed-off-by: Joel Kitching <kitching@google.com>
Change-Id: I8b51ca68456fc9b655e4dc2d0958b7c040d50510
Reviewed-on: https://review.coreboot.org/c/29646
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'src/security/tpm/tss/tcg-1.2')
-rw-r--r-- | src/security/tpm/tss/tcg-1.2/tss.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/security/tpm/tss/tcg-1.2/tss.c b/src/security/tpm/tss/tcg-1.2/tss.c index 0cb7eaa819..b11d6a3d16 100644 --- a/src/security/tpm/tss/tcg-1.2/tss.c +++ b/src/security/tpm/tss/tcg-1.2/tss.c @@ -178,6 +178,12 @@ uint32_t tlcl_resume(void) return send(tpm_resume_cmd.buffer); } +uint32_t tlcl_save_state(void) +{ + VBDEBUG("TPM: Save state\n"); + return send(tpm_savestate_cmd.buffer); +} + uint32_t tlcl_self_test_full(void) { VBDEBUG("TPM: Self test full\n"); |