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| author | Angel Pons <th3fanbus@gmail.com> | 2020-05-01 22:41:13 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-19 07:56:39 +0000 |
| commit | fb6606b8dbf9711c86872e75ce472a98ffe1ba2d (patch) | |
| tree | c0786e117ad922977d2f001af01436d99c8c743e /src/security/tpm | |
| parent | 254003740674a72ac794c984200666517109adb8 (diff) | |
| download | coreboot-fb6606b8dbf9711c86872e75ce472a98ffe1ba2d.tar.xz | |
nb/intel/sandybridge: Correct IOSAV register notes
The IOSAV register descriptions are plagued with errors and nonsense.
Using `git blame` to find the culprit... Zoinks! Turns out it was me!
Rewrite the comment so that the difference between a sub-sequence and a
command is clear. Also, expand the descriptions that could be ambiguous
and fix some insane blunders. CKE and ODT fields are per DIMM and rank!
As per review comments, also invert the order of bitfield value ranges.
Change-Id: Ie384304c565f962fe58baa231c15109eb3d284aa
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40952
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/security/tpm')
0 files changed, 0 insertions, 0 deletions