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| author | Thomas Heijligen <thomas.heijligen@secunet.com> | 2019-02-19 10:51:34 +0000 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-15 12:58:28 +0000 |
| commit | 725369fd0cfb52c914c7c1afdb43b5b13072a16a (patch) | |
| tree | c2d22ee11aa5e94c95777fb72e64a949efc869fc /src/security/vboot | |
| parent | 02bd77379bec15ecbbe4f931d19112d267ef4607 (diff) | |
| download | coreboot-725369fd0cfb52c914c7c1afdb43b5b13072a16a.tar.xz | |
inteltool: add 300 and C240 Series PCH
Values from
- Intel doc 337347 rev4
- coreboot soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h
On Coffeelake H (using Cannonlake / Cannonpoint PCH) p2sb is not
accessible. Using a static value instead. 0xfd000000 is a common value
chosen by coreboot and non-coreboot firmware.
Change-Id: Id637f703ab0a99eb0908ecdc3da27ba80db1c6b8
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31500
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/security/vboot')
0 files changed, 0 insertions, 0 deletions