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authorElyes HAOUAS <ehaouas@noos.fr>2020-08-02 08:58:05 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-08-18 12:18:18 +0000
commitec17902485dd705a6e09cf4cb6b37802190b1463 (patch)
tree304283d2c28b19369233f866128e357aad6fdff5 /src/security
parent0c1d2eba0da550ec751a66bacc10acf6c4865442 (diff)
downloadcoreboot-ec17902485dd705a6e09cf4cb6b37802190b1463.tar.xz
src: Remove unused 'include <lib.h>'
Change-Id: Ic09fc4ff4ee5524d89366e28d1d22900dd0c5b4d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44100 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/security')
-rw-r--r--src/security/intel/txt/ramstage.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/security/intel/txt/ramstage.c b/src/security/intel/txt/ramstage.c
index 8627a2b5c9..145182fb75 100644
--- a/src/security/intel/txt/ramstage.c
+++ b/src/security/intel/txt/ramstage.c
@@ -10,7 +10,6 @@
#include <cpu/intel/common/common.h>
#include <cpu/x86/msr.h>
-#include <lib.h>
#include <device/pci_ops.h>
#include "txt.h"