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| author | Eugene D Myers <cedarhouse@comcast.net> | 2020-04-15 18:28:10 -0400 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-02 17:03:48 +0000 |
| commit | 076605bc92730553e9adae543713f0d356a94709 (patch) | |
| tree | ec70d2818f516fd208f7f16d20e8b3f8c7091e97 /src/security | |
| parent | 7bab4c90a72a0e3599d6dbda0a72e8d470fd3fbf (diff) | |
| download | coreboot-076605bc92730553e9adae543713f0d356a94709.tar.xz | |
intel/stm: Place resource list right below MSEG
Suggested by Nico Huber in CB:38765.
This placement makes the address calculation simpler and
makes its location indepedent of the number of CPUs.
As part of the change in the BIOS resource list address
calculation, the `size` variable was factored out of the
conditional in line 361, thus eliminating the else.
Change-Id: I9ee2747474df02b0306530048bdec75e95413b5d
Signed-off-by: Eugene D Myers <cedarhouse@comcast.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40437
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/security')
| -rw-r--r-- | src/security/intel/stm/StmPlatformSmm.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/src/security/intel/stm/StmPlatformSmm.c b/src/security/intel/stm/StmPlatformSmm.c index 45db0e069f..248ccc028a 100644 --- a/src/security/intel/stm/StmPlatformSmm.c +++ b/src/security/intel/stm/StmPlatformSmm.c @@ -177,12 +177,7 @@ void stm_setup(uintptr_t mseg, int cpu, int num_cpus, uintptr_t smbase, // need to create the BIOS resource list once // first calculate the location in SMRAM - addr_calc = (mseg - (CONFIG_SMM_MODULE_STACK_SIZE * num_cpus)); - - if (CONFIG(SSE)) - addr_calc -= FXSAVE_SIZE * num_cpus; - - addr_calc -= CONFIG_BIOS_RESOURCE_LIST_SIZE; + addr_calc = mseg - CONFIG_BIOS_RESOURCE_LIST_SIZE; stm_resource_heap = (uint8_t *) addr_calc; printk(BIOS_DEBUG, "STM: stm_resource_heap located at %p\n", stm_resource_heap); |