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| author | Felix Held <felix-coreboot@felixheld.de> | 2021-03-10 15:47:00 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-03-11 15:11:20 +0000 |
| commit | a5cdf75f690c2fb48d00df6ab4e7ba2bfd8a4480 (patch) | |
| tree | 93de8f242ab575df4d02b8be7a24713e0099a9ed /src/soc/amd/cezanne/include | |
| parent | 4626a6684ca02675cebd4e5ceea8ca959cd13472 (diff) | |
| download | coreboot-a5cdf75f690c2fb48d00df6ab4e7ba2bfd8a4480.tar.xz | |
soc/amd: move warm reset flag function prototypes to common code
Even though the implementation is different on Stoneyridge compared to
Picasso and Cezanne, the function prototypes are identical, so move them
to the AMD SoC common reset header file.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8d3a3a9ea568ea18658c49612efabdbe36d5f957
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51395
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/cezanne/include')
| -rw-r--r-- | src/soc/amd/cezanne/include/soc/reset.h | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/src/soc/amd/cezanne/include/soc/reset.h b/src/soc/amd/cezanne/include/soc/reset.h deleted file mode 100644 index 4cb94ced02..0000000000 --- a/src/soc/amd/cezanne/include/soc/reset.h +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef AMD_CEZANNE_RESET_H -#define AMD_CEZANNE_RESET_H - -void set_warm_reset_flag(void); -int is_warm_reset(void); - -#endif /* AMD_CEZANNE_RESET_H */ |