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authorKangheui Won <khwon@chromium.org>2021-05-06 13:30:51 +1000
committerMartin Roth <martinroth@google.com>2021-05-10 04:07:09 +0000
commit5858fb4e351ad9064c3970f7f221ec6f75b5dae5 (patch)
tree08d9ecf040012be96e726a019de1d572d028333b /src/soc/amd/cezanne/psp_verstage
parenta5dae4c4d6a7e206fe3f968088d623b2ec776db4 (diff)
downloadcoreboot-5858fb4e351ad9064c3970f7f221ec6f75b5dae5.tar.xz
psp_verstage: differentiate bios entry
AMDFW tool stores bios dir entry to bios1_entry in picasso but bios3_entry in cezanne. Separate getting bios_dir_addr into a function and implement it on each platforms. Signed-off-by: Kangheui Won <khwon@chromium.org> Change-Id: Ie18ed7979a04319c074b9b251130d419dc7f22dc Reviewed-on: https://review.coreboot.org/c/coreboot/+/52964 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/cezanne/psp_verstage')
-rw-r--r--src/soc/amd/cezanne/psp_verstage/chipset.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/psp_verstage/chipset.c b/src/soc/amd/cezanne/psp_verstage/chipset.c
index 7f944ebcbc..c0593bf05a 100644
--- a/src/soc/amd/cezanne/psp_verstage/chipset.c
+++ b/src/soc/amd/cezanne/psp_verstage/chipset.c
@@ -21,6 +21,11 @@ uint32_t save_uapp_data(void *address, uint32_t size)
return svc_save_uapp_data(address, size);
}
+uint32_t get_bios_dir_addr(struct psp_ef_table *ef_table)
+{
+ return ef_table->bios3_entry;
+}
+
/* Functions below are stub functions for not-yet-implemented PSP features.
* These functions should be replaced with proper implementations later.