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author | Furquan Shaikh <furquan@google.com> | 2020-05-09 13:10:30 -0700 |
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committer | Furquan Shaikh <furquan@google.com> | 2020-05-12 20:04:15 +0000 |
commit | 08c524c0b7266fd9f51e0d412bdac2b4d14c09e0 (patch) | |
tree | 5d4b1a3c3e966b53193c36f5c1962647b22b6934 /src/soc/amd/common/block/include/amdblocks/chip.h | |
parent | 56875113b7472d806655c7871e013eecefba70c5 (diff) | |
download | coreboot-08c524c0b7266fd9f51e0d412bdac2b4d14c09e0.tar.xz |
soc/amd/common/block/spi: Add support for common SPI configuration
This change adds support for following SPI configuration functions to
common block SPI driver and exposes them to be used by SoC:
1. fch_spi_early_init(): Sets up SPI ROM base, enables SPI ROM,
enables prefetching, disables 4dw burst mode and sets SPI speed and mode.
2. fch_spi_config_modes(): This allows SoC to configure SPI speed and
mode. It uses SPI settings from soc_amd_common_config to configure the
speed and mode.
These functions expect SoC to include soc_amd_common_config in SoC
chip config and mainboard to configure these settings in device tree.
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: Ia4f231bab69e8450005dd6abe7a8e014d5eb7261
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41248
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common/block/include/amdblocks/chip.h')
-rw-r--r-- | src/soc/amd/common/block/include/amdblocks/chip.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/chip.h b/src/soc/amd/common/block/include/amdblocks/chip.h index 26ad26a6b1..6e3c973c97 100644 --- a/src/soc/amd/common/block/include/amdblocks/chip.h +++ b/src/soc/amd/common/block/include/amdblocks/chip.h @@ -4,7 +4,19 @@ #ifndef __AMDBLOCKS_CHIP_H__ #define __AMDBLOCKS_CHIP_H__ +#include <amdblocks/spi.h> + struct soc_amd_common_config { + /* + * SPI configuration + * Default values if not overridden by mainboard: + * Read mode - Normal 33MHz + * Normal speed - 66MHz + * Fast speed - 66MHz + * Alt speed - 66MHz + * TPM speed - 66MHz + */ + struct spi_config spi_config; }; /* |