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| author | Furquan Shaikh <furquan@google.com> | 2020-06-27 15:24:09 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-06-30 22:51:01 +0000 |
| commit | aaff4017d011041c99777a452f395fbd35546c35 (patch) | |
| tree | 10ee076b378a29e55997837c3d3efab65ecb9d3a /src/soc/amd/common/block/include/amdblocks/gpio_banks.h | |
| parent | 05d30605ec62f916efca5ae47b581135cb41641b (diff) | |
| download | coreboot-aaff4017d011041c99777a452f395fbd35546c35.tar.xz | |
mb/google/kahlee: Do not enable SCI for H1_PCH_INT_ODL
H1 is not a wake source and hence there is no need to configure SCI
GEVENT for it. This change drops PAD_SCI() configuration for GPIO_9
i.e. H1_PCH_INT_ODL.
BUG=b:159944426
Change-Id: Iec2285b76f9c5fa1b4b1be15128fea316fa04555
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42874
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd/common/block/include/amdblocks/gpio_banks.h')
0 files changed, 0 insertions, 0 deletions