diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-10-12 16:04:08 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-11-08 21:58:59 +0000 |
| commit | 596ecec009d722aebbfc16074b89bc78dc9ede26 (patch) | |
| tree | d9722ff5cb487f65e7eb91c27cb237deed33295c /src/soc/amd/common/block/include/amdblocks/psp.h | |
| parent | 154239aff1602e0ae27f9ce1f2df0647e4aef0a8 (diff) | |
| download | coreboot-596ecec009d722aebbfc16074b89bc78dc9ede26.tar.xz | |
soc/amd/common/psp: Add command to load fw blobs
An upcoming PSP firmware change will allow coreboot to load the two
SMU firmware blobs (one runs in SRAM and the other in DRAM). The
traditional method is for the PSP to control most of the process,
e.g. loading the SRAM version prior to releasing the x86 reset.
Add a new command that can instruct the PSP to load a firmware blob
from a location in the flash.
The definition for commands 19 and 1a differ from others in that they
do not use a command/response buffer. Instead, the PSP will look in
the command/response pointer registers directly for the blob's
address.
BUG=b:66339938
Change-Id: I8431af341930f45ac74f471628b4dc4ede7735f4
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/22056
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd/common/block/include/amdblocks/psp.h')
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/psp.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/psp.h b/src/soc/amd/common/block/include/amdblocks/psp.h index d210498502..74ea73f7f7 100644 --- a/src/soc/amd/common/block/include/amdblocks/psp.h +++ b/src/soc/amd/common/block/include/amdblocks/psp.h @@ -32,6 +32,8 @@ #define MBOX_BIOS_CMD_CLEAR_S3_STS 0x07 #define MBOX_BIOS_CMD_C3_DATA_INFO 0x08 #define MBOX_BIOS_CMD_NOP 0x09 +#define MBOX_BIOS_CMD_SMU_FW 0x19 +#define MBOX_BIOS_CMD_SMU_FW2 0x1a #define MBOX_BIOS_CMD_ABORT 0xfe /* generic PSP interface status */ @@ -79,11 +81,23 @@ struct mbox_default_buffer { /* command-response buffer unused by command */ #define PSPSTS_SEND_ERROR 4 #define PSPSTS_INIT_TIMEOUT 5 #define PSPSTS_CMD_TIMEOUT 6 +/* other error codes */ +#define PSPSTS_UNSUPPORTED 7 +#define PSPSTS_INVALID_NAME 8 +#define PSPSTS_INVALID_BLOB 9 #define PSP_INIT_TIMEOUT 10000 /* 10 seconds */ #define PSP_CMD_TIMEOUT 1000 /* 1 second */ /* BIOS-to-PSP functions return 0 if successful, else negative value */ + int psp_notify_dram(void); +/* + * type: identical to the corresponding PSP command, e.g. pass + * MBOX_BIOS_CMD_SMU_FW2 to load SMU FW2 blob. + * name: cbfs file name + */ +int psp_load_named_blob(int type, const char *name); + #endif /* __AMD_PSP_H__ */ |