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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-05-03 11:44:22 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-06-06 18:51:03 +0000 |
| commit | 4ee83b2f9435fe08cb73ba818b567597cafd973d (patch) | |
| tree | 3a0d2a58b62ac87d990703926aaf82d8347d5d49 /src/soc/amd/common/block/include/amdblocks | |
| parent | 3ce0360592f036ce586a49db84146d435a23e662 (diff) | |
| download | coreboot-4ee83b2f9435fe08cb73ba818b567597cafd973d.tar.xz | |
soc/amd/stoneyridge: Relocate MMIO access of ACPI registers
The AcpiMmio block allowing direct access to the ACPI registers
has remained consistent across AMD models. Move the support from
soc//stoneyridge to soc//common.
BUG=b:131682806
Change-Id: I0e017a71f8efb4b614986cb327de398644599853
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32655
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common/block/include/amdblocks')
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/acpi.h | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/acpi.h b/src/soc/amd/common/block/include/amdblocks/acpi.h new file mode 100644 index 0000000000..cf266ed7d8 --- /dev/null +++ b/src/soc/amd/common/block/include/amdblocks/acpi.h @@ -0,0 +1,42 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2017 Google, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __AMDBLOCKS_ACPI_H__ +#define __AMDBLOCKS_ACPI_H__ + +#include <stdint.h> + +/* ACPI MMIO registers 0xfed80800 */ +#define MMIO_ACPI_PM1_STS 0x00 +#define MMIO_ACPI_PM1_EN 0x02 +#define MMIO_ACPI_PM1_CNT_BLK 0x04 + /* sleep types defined in arch/x86/include/arch/acpi.h */ +#define ACPI_PM1_CNT_SCIEN BIT(0) +#define MMIO_ACPI_PM_TMR_BLK 0x08 +#define MMIO_ACPI_CPU_CONTROL 0x0c +#define MMIO_ACPI_GPE0_STS 0x14 +#define MMIO_ACPI_GPE0_EN 0x18 + +void acpi_clear_pm1_status(void); + +/* + * If a system reset is about to be requested, modify the PM1 register so it + * will never be misinterpreted as an S3 resume. + */ +void set_pm1cnt_s5(void); +void acpi_enable_sci(void); +void acpi_disable_sci(void); + +#endif /* __AMDBLOCKS_ACPI_H__ */ |