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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-17 23:55:41 +0300 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-25 19:02:24 +0000 |
commit | 79d41263d97f8d11c0e3675b4cc89fa63d3eedf4 (patch) | |
tree | 5e4549be80e068e5e95288d6bb56610b2db11695 /src/soc/amd/common/block/include/amdblocks | |
parent | e8afb0ee92a5e532153d96de833e4a88589761de (diff) | |
download | coreboot-79d41263d97f8d11c0e3675b4cc89fa63d3eedf4.tar.xz |
Revert "soc/amd/common/block/acpimmio: Update acpimmio for psp_verstage"
This reverts commit 4883252912665f56c8e7801fe03a26594a1e9d5d.
Almost everything in <amdblocks/acpimmio_map.h> is invalid for PSP as
it does not have the same view of memory space.
The prototypes xx_set/get_bar() are only valid for PSP as x86 cores
will use the constant mapping defined in <amdblocks/acpimmio_map.h>
The selected MMIO base address model depends of the architecture the
stage is built for and, to current knowledge, nothing else. So
the guards should have been with ENV_X86 vs ENV_ARM and not about
CONFIG(VERSTAGE_BEFORE_BOOTBLOCK).
For the ENV_ARM stage builds, <arch/io.h> file referenced in the
previously added mmio_util_psp.c file has not been added to the tree.
So there was some out-of-order submitting, which did not get caught
as the build-testing of mixed-arch stages has not been incorporated
into the tree yet.
The previously added file mmio_util_psp.c is also 90% redundant with
mmio_util.c.
Change-Id: I1d632f52745bc6cd3c3dbddb1ea5ff9ba962c2e8
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42486
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common/block/include/amdblocks')
-rw-r--r-- | src/soc/amd/common/block/include/amdblocks/acpimmio.h | 33 |
1 files changed, 0 insertions, 33 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h index a0ab615840..84a9360d1b 100644 --- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h +++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h @@ -100,38 +100,6 @@ void pm_io_write8(uint8_t reg, uint8_t value); void pm_io_write16(uint8_t reg, uint16_t value); void pm_io_write32(uint8_t reg, uint32_t value); -void iomux_set_bar(void *bar); -void *iomux_get_bar(void); -void misc_set_bar(void *bar); -void *misc_get_bar(void); -void gpio_set_bar(void *bar); -void *gpio_get_bar(void); -void aoac_set_bar(void *bar); -void *aoac_get_bar(void); -void io_set_bar(void *bar); -u8 io_read8(u16 reg); -void io_write8(u16 reg, u8 value); - - -#if (CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) && ENV_SEPARATE_VERSTAGE) - -u8 iomux_read8(u8 reg); -u16 iomux_read16(u8 reg); -u32 iomux_read32(u8 reg); -void iomux_write8(u8 reg, u8 value); -void iomux_write16(u8 reg, u16 value); -void iomux_write32(u8 reg, u32 value); -u8 misc_read8(u8 reg); -u16 misc_read16(u8 reg); -u32 misc_read32(u8 reg); -void misc_write8(u8 reg, u8 value); -void misc_write16(u8 reg, u16 value); -void misc_write32(u8 reg, u32 value); -u8 aoac_read8(u8 reg); -void aoac_write8(u8 reg, u8 value); - -#else - static inline uint8_t sm_pci_read8(uint8_t reg) { return read8((void *)(ACPIMMIO_SM_PCI_BASE + reg)); @@ -547,5 +515,4 @@ static inline void aoac_write8(uint8_t reg, uint8_t value) write8((void *)(ACPIMMIO_AOAC_BASE + reg), value); } -#endif /* (CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) && ENV_SEPARATE_VERSTAGE) */ #endif /* __AMDBLOCKS_ACPIMMIO_H__ */ |