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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-11-15 15:47:54 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-01-19 19:47:17 +0000 |
| commit | e01cfc94759d8fdbfa5f751f298bbfd04db7f672 (patch) | |
| tree | f4e83458bac98b017ba380a8ea24ba94ab08b552 /src/soc/amd/common/block/pi | |
| parent | 85b2e910df73affa8e12c0b66fc33c5b8c1e5f69 (diff) | |
| download | coreboot-e01cfc94759d8fdbfa5f751f298bbfd04db7f672.tar.xz | |
amd/common: Define regions in AGESA cbmem
In 6c747068 "amd/stoneyridge: Put AGESA heap into cbmem" the AGESA
heap was moved completely into cbmem. This was a departure from the
"late cbmem init" method of adding it late in post, then storing the
S3 volatile data to the region. Remove the hardcoded base address
that was missed in that commit.
To prepare for S3 support, split the region into subregions for
heap, AGESA's S3 volatile storage, and an MTRR save area.
BUG=b:69614064
Change-Id: I06c137f56516f3a04091d1191cd657a0aa07320b
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/22720
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/common/block/pi')
| -rw-r--r-- | src/soc/amd/common/block/pi/heapmanager.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/pi/heapmanager.c b/src/soc/amd/common/block/pi/heapmanager.c index 862ba3d524..f139a7fcb6 100644 --- a/src/soc/amd/common/block/pi/heapmanager.c +++ b/src/soc/amd/common/block/pi/heapmanager.c @@ -21,7 +21,10 @@ static void *GetHeapBase(void) { - return cbmem_add(CBMEM_ID_RESUME_SCRATCH, BIOS_HEAP_SIZE); + struct cbmem_usage *heap; + heap = (struct cbmem_usage *)cbmem_add(CBMEM_ID_RESUME_SCRATCH, + sizeof(struct cbmem_usage)); + return &heap->heap_base; } static void EmptyHeap(int unused) |