soc/amd/stoneyridge: Add northbridge support

Copy northbridge files from northbridge/amd/pi/00670F00
to soc/amd/stoneyridge and soc/amd/common.

Changes:
- update chip_ops and device_ops
- remove multi-node support
- clean up Kconfig and Makefile

Change-Id: Ie86b4d744900f23502068517ece5bcea6c128993
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19724
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>

1 files changed, 25 insertions, 0 deletions

diff --git a/src/soc/amd/common/dimmSpd.h b/src/soc/amd/common/dimmSpd.h
new file mode 100644
index 0000000000..1ad45469e2
--- /dev/null
+++ b/src/soc/amd/common/dimmSpd.h
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DIMMSPD_H_
+#define _DIMMSPD_H_
+
+AGESA_STATUS
+AmdMemoryReadSPD (IN UINT32 Func, IN UINT32 Data, IN OUT AGESA_READ_SPD_PARAMS *SpdData);
+
+int hudson_readSpd(int spdAddress, char *buf, size_t len);
+int smbus_readSpd(int spdAddress, char *buf, size_t len);
+
+#endif