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| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2019-12-06 12:07:52 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-10 11:18:00 +0000 |
| commit | 200d213d1bae614fcd35913c1d46fec7e495717f (patch) | |
| tree | b8fd2bb816c2938f99d53002a3a54e349c7ff6dc /src/soc/amd/common | |
| parent | a244d5edd4f45fd9e21db3d97ed0a32eaf089e7b (diff) | |
| download | coreboot-200d213d1bae614fcd35913c1d46fec7e495717f.tar.xz | |
amdblocks/pci: add common implementation of MMCONF enabling
Add common function to enable PCI MMCONF base address. Use the common
function in stoneyridge bootblock.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I1bb8b22b282584c421a9fffa3322b2a8e406d037
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37552
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc/amd/common')
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/amd_pci_mmconf.h | 19 | ||||
| -rw-r--r-- | src/soc/amd/common/block/pci/Makefile.inc | 5 | ||||
| -rw-r--r-- | src/soc/amd/common/block/pci/amd_pci_mmconf.c | 27 |
3 files changed, 48 insertions, 3 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/amd_pci_mmconf.h b/src/soc/amd/common/block/include/amdblocks/amd_pci_mmconf.h new file mode 100644 index 0000000000..4b65ad0948 --- /dev/null +++ b/src/soc/amd/common/block/include/amdblocks/amd_pci_mmconf.h @@ -0,0 +1,19 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __AMDBLOCKS_PCI_MMCONF_H__ +#define __AMDBLOCKS_PCI_MMCONF_H__ + +void enable_pci_mmconf(void); + +#endif diff --git a/src/soc/amd/common/block/pci/Makefile.inc b/src/soc/amd/common/block/pci/Makefile.inc index fc40c9d478..558a7ac736 100644 --- a/src/soc/amd/common/block/pci/Makefile.inc +++ b/src/soc/amd/common/block/pci/Makefile.inc @@ -1,5 +1,4 @@ -ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PCI),y) -ramstage-y += amd_pci_util.c +ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PCI) += amd_pci_util.c -endif +all-y += amd_pci_mmconf.c diff --git a/src/soc/amd/common/block/pci/amd_pci_mmconf.c b/src/soc/amd/common/block/pci/amd_pci_mmconf.c new file mode 100644 index 0000000000..1aed51bf1b --- /dev/null +++ b/src/soc/amd/common/block/pci/amd_pci_mmconf.c @@ -0,0 +1,27 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <amdblocks/amd_pci_mmconf.h> +#include <cpu/amd/msr.h> +#include <cpu/x86/msr.h> +#include <cpu/x86/mtrr.h> + +void enable_pci_mmconf(void) +{ + msr_t mmconf; + + mmconf.hi = 0; + mmconf.lo = CONFIG_MMCONF_BASE_ADDRESS | MMIO_RANGE_EN + | fms(CONFIG_MMCONF_BUS_NUMBER) << MMIO_BUS_RANGE_SHIFT; + wrmsr(MMIO_CONF_BASE, mmconf); +} |