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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-12-12 12:38:45 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-26 10:48:06 +0000 |
| commit | cca74861202b12033df87b72bad9e5b8b1fccf43 (patch) | |
| tree | a4b9f400d9e37a96d29303a8b4c71021d5f123a2 /src/soc/amd/picasso/Makefile.inc | |
| parent | da6170a22337af4cf227bdfb4e53fac21516d143 (diff) | |
| download | coreboot-cca74861202b12033df87b72bad9e5b8b1fccf43.tar.xz | |
soc/amd/picasso: Configure APOB NV only with ACPI resume
The APOB NV region holds the save data for resuming. Omit it if the
mainboard doesn't use HAVE_ACPI_RESUME.
The APOB information will also be board-specific so remove the
default values.
Change-Id: I65a70bb86ad1f3c11ce37d0afa5a6fdd08bc46e2
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37722
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/picasso/Makefile.inc')
| -rw-r--r-- | src/soc/amd/picasso/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 4492653713..f1e10c183f 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -207,8 +207,10 @@ PSP_BIOSBIN_DEST=$(CONFIG_ROMSTAGE_ADDR) PSP_BIOSBIN_SIZE=$(CONFIG_RAM_RESET_VECTOR_STAGE_SIZE) # type = 0x63 +ifeq ($(CONFIG_HAVE_ACPI_RESUME),y) PSP_APOBNV_BASE=$(CONFIG_PSP_APOB_NV_ADDRESS) PSP_APOBNV_SIZE=$(CONFIG_PSP_APOB_NV_SIZE) +endif # type2 = 0x64, 0x65 PSP_PMUI_FILE1=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv_1D_Ddr4_Udimm_Imem.csbin |