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| author | Rob Barnes <robbarnes@google.com> | 2020-04-13 01:27:12 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2020-07-13 21:39:05 +0000 |
| commit | 009a23d5c8a02dc2e38c28355b70c2e162d7d7e4 (patch) | |
| tree | 48543fa0a28b9add29a011733873832e987a63c0 /src/soc/amd/picasso/Makefile.inc | |
| parent | 33d9eeae5fd9bcbf093383e282a4424aaae7d855 (diff) | |
| download | coreboot-009a23d5c8a02dc2e38c28355b70c2e162d7d7e4.tar.xz | |
soc/amd/picasso: supply SMBIOS type 17
Extract DRAM info from AMD_FSP_DMI_HOB and store it as mem_info in
cbmem with id CBMEM_ID_MEMINFO. Subsquently extract mem_info objects
from cbmem to build SMBIOS type 17 tables.
BUG=b:148277751,b:160947978
TEST=dmidecode -t 17
BRANCH=none
Change-Id: Iacedbb017d19516674070f89ba0aa217f55383e3
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43351
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/picasso/Makefile.inc')
| -rw-r--r-- | src/soc/amd/picasso/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 823d93347c..b3af1fd1a8 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -79,6 +79,7 @@ ramstage-y += update_microcode.c ramstage-y += graphics.c ramstage-y += pcie_gpp.c ramstage-y += xhci.c +ramstage-y += dmi.c smm-y += smihandler.c smm-y += smi_util.c |