soc/amd: move smi_util to common block

The functionality in smi_util applies for all 3 AMD SoCs in tree. This
patch additionally drops the HAVE_SMI_HANDLER guards in the common
block's Makefile.inc, since all 3 SoCs unconditionally select
HAVE_SMI_HANDLER in their Kconfig and smi_util doesn't use any
functionality that is only present when that option is selected.

Change-Id: I2f930287840bf7aa958f19786c7f1146c683c93e
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48220
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>

1 files changed, 0 insertions, 4 deletions

diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc
index b5e409b055..c77278337e 100644
--- a/src/soc/amd/picasso/Makefile.inc
+++ b/src/soc/amd/picasso/Makefile.inc
@@ -20,7 +20,6 @@ bootblock-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
 bootblock-y += monotonic_timer.c
 bootblock-y += tsc_freq.c
 bootblock-y += gpio.c
-bootblock-y += smi_util.c
 bootblock-y += config.c
 bootblock-y += reset.c
 
@@ -35,7 +34,6 @@ romstage-y += monotonic_timer.c
 romstage-y += tsc_freq.c
 romstage-y += aoac.c
 romstage-y += southbridge.c
-romstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
 romstage-y += psp.c
 romstage-y += config.c
 romstage-y += mrc_cache.c
@@ -66,7 +64,6 @@ ramstage-y += acp.c
 ramstage-y += sata.c
 ramstage-y += memmap.c
 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
-ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
 ramstage-y += uart.c
 ramstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
 ramstage-y += monotonic_timer.c
@@ -83,7 +80,6 @@ ramstage-y += xhci.c
 ramstage-y += dmi.c
 
 smm-y += smihandler.c
-smm-y += smi_util.c
 smm-y += monotonic_timer.c
 smm-y += tsc_freq.c
 ifeq ($(CONFIG_DEBUG_SMI),y)