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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-07-16 15:46:35 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-13 08:36:13 +0000 |
| commit | b1ffca30576770999199fc8b691cfdd1185a30d5 (patch) | |
| tree | 1862c7d787fdf2fa9596b90df2d631e3069a7201 /src/soc/amd/picasso/Makefile.inc | |
| parent | cd39a41278cbe895a1c34a264f5da20226537893 (diff) | |
| download | coreboot-b1ffca30576770999199fc8b691cfdd1185a30d5.tar.xz | |
soc/amd/picasso: Delete northbridge
Family 17h devices are designed with a new internal architecture,
frequently referred to as the data fabric. Although designed to
behave somewhat like the older integrated northbridge designs,
the D18Fx definitions are completely new.
The previous northbridge.c was copied from stoneyridge which is
completely different.
Change-Id: Id70cbda99657249179fb8cf5e461dd6a37ec9153
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41265
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso/Makefile.inc')
| -rw-r--r-- | src/soc/amd/picasso/Makefile.inc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 43bb32e7f0..0e5cdf54ce 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -48,7 +48,6 @@ ramstage-y += mca.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c ramstage-y += gpio.c ramstage-y += southbridge.c -ramstage-y += northbridge.c ramstage-y += pmutil.c ramstage-y += acp.c ramstage-y += sata.c |