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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-12-13 18:11:05 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-12-16 09:47:56 +0000
commit9db39879a8b45558db267614dc42eb6bf3d8fd58 (patch)
tree9e4e8b88f7d3e630fc0935469ac8811257859f2b /src/soc/amd/picasso/Makefile.inc
parent41956b574212224127ba393f6e65be88de6f3f21 (diff)
downloadcoreboot-9db39879a8b45558db267614dc42eb6bf3d8fd58.tar.xz
soc/amd,{agesa,pi}/hudson: Have do_board_reset in all stages
Change-Id: I38a721c359ab7761c5a3ea79da0c159fd7f58970 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37711 Reviewed-by: Mike Banon <mikebdp2@gmail.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso/Makefile.inc')
-rw-r--r--src/soc/amd/picasso/Makefile.inc5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc
index 76a4d70a8a..4492653713 100644
--- a/src/soc/amd/picasso/Makefile.inc
+++ b/src/soc/amd/picasso/Makefile.inc
@@ -41,7 +41,6 @@ romstage-y += i2c.c
romstage-y += romstage.c
romstage-y += gpio.c
romstage-y += pmutil.c
-romstage-y += reset.c
romstage-y += smbus.c
romstage-y += memmap.c
romstage-$(CONFIG_PICASSO_UART) += uart.c
@@ -52,7 +51,6 @@ romstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
verstage-y += gpio.c
verstage-y += i2c.c
verstage-y += pmutil.c
-verstage-y += reset.c
verstage-$(CONFIG_PICASSO_UART) += uart.c
verstage-y += tsc_freq.c
@@ -71,7 +69,6 @@ ramstage-y += gpio.c
ramstage-y += southbridge.c
ramstage-y += northbridge.c
ramstage-y += pmutil.c
-ramstage-y += reset.c
ramstage-y += acp.c
ramstage-y += sata.c
ramstage-y += sm.c
@@ -84,6 +81,8 @@ ramstage-y += usb.c
ramstage-y += tsc_freq.c
ramstage-y += finalize.c
+all-y += reset.c
+
smm-y += smihandler.c
smm-y += smi_util.c
smm-y += tsc_freq.c