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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-06-11 12:18:20 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-03 21:30:16 +0000 |
| commit | bc4c903c1f0bbf5297309082f31cfc2f70addb99 (patch) | |
| tree | 99924f3d876aad0b7d56dfd974ece168c5028c9f /src/soc/amd/picasso/acpi.c | |
| parent | 30cf1551683810504f7823e42d4cb6515459cff8 (diff) | |
| download | coreboot-bc4c903c1f0bbf5297309082f31cfc2f70addb99.tar.xz | |
soc/amd/picasso: Change all remaining soc names
Convert all remaining stoneyridge names to picasso.
Change-Id: I0ed3eaa5b1d2696448ae18b62c7218de59c61883
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33749
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/soc/amd/picasso/acpi.c')
| -rw-r--r-- | src/soc/amd/picasso/acpi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index d1ea24ffd5..daeb7b60b4 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -75,7 +75,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) { acpi_header_t *header = &(fadt->header); - printk(BIOS_DEBUG, "pm_base: 0x%04x\n", STONEYRIDGE_ACPI_IO_BASE); + printk(BIOS_DEBUG, "pm_base: 0x%04x\n", PICASSO_ACPI_IO_BASE); /* Prepare the header */ memset((void *)fadt, 0, sizeof(acpi_fadt_t)); @@ -241,7 +241,7 @@ void generate_cpu_entries(struct device *device) { int cores, cpu; - /* Stoney Ridge is single node, just report # of cores */ + /* Picasso is single node, just report # of cores */ cores = pci_read_config32(SOC_NB_DEV, NB_CAPABILITIES2) & CMP_CAP_MASK; cores++; /* number of cores is CmpCap+1 */ |