diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-07-09 18:12:03 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-10-20 16:28:34 +0000 |
| commit | e0fd9a60e7a869eed8bf368afe1e1ab6e6da7a6c (patch) | |
| tree | 00d6d4ec19af0298f6a1b92505aea2a7be848578 /src/soc/amd/picasso/acpi | |
| parent | 6261141579e7a681b4d1ccfef039e2fb8e4ffa72 (diff) | |
| download | coreboot-e0fd9a60e7a869eed8bf368afe1e1ab6e6da7a6c.tar.xz | |
soc/amd/picasso: Update for USB3.1
Change to the appropriate device IDs. Remove the ehci resource
call. Remove overcurrent settings, as this will be passed to
AGESA in later change.
Remove unused USB2 ACPI name assignment.
Change-Id: Ic287a05b30ca03e3371cc4a30aaa93b236c6d3fb
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34420
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/picasso/acpi')
| -rw-r--r-- | src/soc/amd/picasso/acpi/sb_pci0_fch.asl | 18 |
1 files changed, 1 insertions, 17 deletions
diff --git a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl b/src/soc/amd/picasso/acpi/sb_pci0_fch.asl index b9eeadb4ae..645d55569e 100644 --- a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl +++ b/src/soc/amd/picasso/acpi/sb_pci0_fch.asl @@ -243,20 +243,6 @@ Field( SMIC, ByteAcc, NoLock, Preserve) { offset (0x1e5f), /* SATA D3 State */ SADS, 3, - offset (0x1e64), /* USB2 D3 Control */ - U2TD, 2, - , 1, - U2PD, 1, - offset (0x1e65), /* USB2 D3 State */ - U2DS, 3, - - offset (0x1e6e), /* USB3 D3 Control */ - U3TD, 2, - , 1, - U3PD, 1, - offset (0x1e6f), /* USB3 D3 State */ - U3DS, 3, - offset (0x1e71), /* SD D3 State */ SDDS, 3, @@ -456,9 +442,7 @@ Method(FDDC, 2, Serialized) if(LEqual(I3TD, 3)) { if(LEqual(U0TD, 3)) { if(LEqual(U1TD, 3)) { - if(LEqual(U2TD, 3)) { - Store(Zero, PG2_) - } + Store(Zero, PG2_) } } } |