summaryrefslogtreecommitdiff
path: root/src/soc/amd/picasso/chip.h
diff options
context:
space:
mode:
authorFurquan Shaikh <furquan@google.com>2020-05-09 17:24:42 -0700
committerFurquan Shaikh <furquan@google.com>2020-05-12 20:04:31 +0000
commit13b8158672d7a6509633d77e753e865db2fe09ef (patch)
tree48b13117b7ea51a284d1ed3ff471ad884a176ce1 /src/soc/amd/picasso/chip.h
parent033aa0dfc3e6c2478b6e21a75c751293ddeb6d35 (diff)
downloadcoreboot-13b8158672d7a6509633d77e753e865db2fe09ef.tar.xz
soc/amd/picasso: Use SPI configuration support from common block SPI driver
This change switches to using the common block SPI driver for performing early SPI initialization and for re-configuring SPI speed and mode after FSP-S has run. Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: Ia3186ce59b66c2f44522a94fa52659b4942649b1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41250 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/picasso/chip.h')
-rw-r--r--src/soc/amd/picasso/chip.h15
1 files changed, 0 insertions, 15 deletions
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index 2b9ef3c37a..8d4e0d3875 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -73,21 +73,6 @@ struct soc_amd_picasso_config {
uint8_t min_soc_vid_offset;
uint8_t aclk_dpm0_freq_400MHz;
- /*
- * SPI config
- * Default values if not overridden by mainboard:
- * Read mode - Normal 33MHz
- * Normal speed - 66MHz
- * Fast speed - 66MHz
- * Alt speed - 66MHz
- * TPM speed - 66MHz
- */
- enum spi_read_mode spi_read_mode;
- enum spi100_speed spi_normal_speed;
- enum spi100_speed spi_fast_speed;
- enum spi100_speed spi_altio_speed;
- enum spi100_speed spi_tpm_speed;
-
enum {
SD_EMMC_DISABLE,
SD_EMMC_SD_LOW_SPEED,