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| author | Felix Held <felix-coreboot@felixheld.de> | 2020-07-21 17:09:31 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-07-23 13:47:39 +0000 |
| commit | 86db2c74ffc38ad6ca92c62f0fb2858a2423c089 (patch) | |
| tree | 546f8cc26eda84d97d2eff47c07defebe9393db4 /src/soc/amd/picasso/fsp_params.c | |
| parent | a19d98647b0b1862c28b362505b30f4551b2fe2c (diff) | |
| download | coreboot-86db2c74ffc38ad6ca92c62f0fb2858a2423c089.tar.xz | |
amd/picasso: rename PCIe descriptor to DXIO descriptor
Most of the DXIO descriptors are used to configure PCIe engines and
lanes, but on Picasso system some of the DXIO lanes can also be
configured as SATA or XGBE ports.
Change-Id: I28da1b21cf0de1813d87a6873b8d4ef3c1e0e9dd
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43675
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso/fsp_params.c')
| -rw-r--r-- | src/soc/amd/picasso/fsp_params.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/amd/picasso/fsp_params.c b/src/soc/amd/picasso/fsp_params.c index 80d43fb245..8683e9b836 100644 --- a/src/soc/amd/picasso/fsp_params.c +++ b/src/soc/amd/picasso/fsp_params.c @@ -55,8 +55,8 @@ static void fsps_update_emmc_config(FSP_S_CONFIG *scfg, scfg->emmc0_mode = val; } -static void fill_pcie_descriptors(FSP_S_CONFIG *scfg, - const fsp_pcie_descriptor *descs, size_t num) +static void fill_dxio_descriptors(FSP_S_CONFIG *scfg, + const fsp_dxio_descriptor *descs, size_t num) { size_t i; @@ -76,14 +76,14 @@ static void fill_ddi_descriptors(FSP_S_CONFIG *scfg, } static void fsp_fill_pcie_ddi_descriptors(FSP_S_CONFIG *scfg) { - const fsp_pcie_descriptor *fsp_pcie; + const fsp_dxio_descriptor *fsp_dxio; const fsp_ddi_descriptor *fsp_ddi; - size_t num_pcie; + size_t num_dxio; size_t num_ddi; - mainboard_get_pcie_ddi_descriptors(&fsp_pcie, &num_pcie, + mainboard_get_dxio_ddi_descriptors(&fsp_dxio, &num_dxio, &fsp_ddi, &num_ddi); - fill_pcie_descriptors(scfg, fsp_pcie, num_pcie); + fill_dxio_descriptors(scfg, fsp_dxio, num_dxio); fill_ddi_descriptors(scfg, fsp_ddi, num_ddi); } |