diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-06-14 09:51:02 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-08-09 20:19:05 +0000 |
| commit | 2e0f2788a88bdb788f897fdb93060aa6f5893a31 (patch) | |
| tree | 4fbe13d9475c02b97166ef8ebcd4b602c3bfa0d0 /src/soc/amd/picasso/gpio.c | |
| parent | 4c81167ce419853c03f98d4160a70c493c4c1606 (diff) | |
| download | coreboot-2e0f2788a88bdb788f897fdb93060aa6f5893a31.tar.xz | |
src/soc/amd/picasso: Update GPIO configuration
Make the definitions match Picasso's definitions. Add/remove pins
that differ from stoneyridge, update GEVENTs for the FCH mapping.
Change-Id: I59f958151f27ed4ca0eb1a87ade6102eec1e5061
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33761
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/picasso/gpio.c')
| -rw-r--r-- | src/soc/amd/picasso/gpio.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/soc/amd/picasso/gpio.c b/src/soc/amd/picasso/gpio.c index f63a0d93a4..ea868ebd02 100644 --- a/src/soc/amd/picasso/gpio.c +++ b/src/soc/amd/picasso/gpio.c @@ -22,6 +22,7 @@ #include <soc/smi.h> static const struct soc_amd_event gpio_event_table[] = { + { GPIO_0, GEVENT_21 }, /* GPIO0 may only be used as PWR_BTN_L in ACPI */ { GPIO_1, GEVENT_19 }, { GPIO_2, GEVENT_8 }, { GPIO_3, GEVENT_2 }, @@ -31,10 +32,6 @@ static const struct soc_amd_event gpio_event_table[] = { { GPIO_7, GEVENT_11 }, { GPIO_8, GEVENT_23 }, { GPIO_9, GEVENT_22 }, - { GPIO_11, GEVENT_18 }, - { GPIO_13, GEVENT_21 }, - { GPIO_14, GEVENT_6 }, - { GPIO_15, GEVENT_20 }, { GPIO_16, GEVENT_12 }, { GPIO_17, GEVENT_13 }, { GPIO_18, GEVENT_14 }, @@ -42,10 +39,13 @@ static const struct soc_amd_event gpio_event_table[] = { { GPIO_22, GEVENT_3 }, { GPIO_23, GEVENT_16 }, { GPIO_24, GEVENT_15 }, - { GPIO_65, GEVENT_0 }, - { GPIO_66, GEVENT_1 }, - { GPIO_68, GEVENT_9 }, - { GPIO_69, GEVENT_17 }, + { GPIO_40, GEVENT_20 }, + { GPIO_84, GEVENT_18 }, + { GPIO_86, GEVENT_9 }, + { GPIO_89, GEVENT_0 }, + { GPIO_90, GEVENT_1 }, + { GPIO_91, GEVENT_6 }, + { GPIO_129, GEVENT_17 }, }; void soc_route_sci(uint8_t event) |