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authorMarshall Dawson <marshalldawson3rd@gmail.com>2019-07-01 10:53:40 -0500
committerMartin Roth <martinroth@google.com>2019-07-03 21:48:52 +0000
commit7997f1ff88d6154890b2489c93548f266ae6b8a9 (patch)
tree810efcd701b1394ca8146b677f79790f602dd86d /src/soc/amd/picasso/include
parentfa4a74b098731bf3e0979c20a65fa883bf4c57f3 (diff)
downloadcoreboot-7997f1ff88d6154890b2489c93548f266ae6b8a9.tar.xz
soc/amd/picasso: Remove SD controller
Change-Id: Ie9cf361ed0caba9c73727453c4a503557edc854d Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33988 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/picasso/include')
-rw-r--r--src/soc/amd/picasso/include/soc/pci_devs.h7
-rw-r--r--src/soc/amd/picasso/include/soc/southbridge.h4
2 files changed, 1 insertions, 10 deletions
diff --git a/src/soc/amd/picasso/include/soc/pci_devs.h b/src/soc/amd/picasso/include/soc/pci_devs.h
index c823fdbfdc..8a885f2c0b 100644
--- a/src/soc/amd/picasso/include/soc/pci_devs.h
+++ b/src/soc/amd/picasso/include/soc/pci_devs.h
@@ -188,11 +188,4 @@
#define LPC_DEVFN PCI_DEVFN(PCU_DEV, LPC_FUNC)
#define SOC_LPC_DEV _SOC_DEV(PCU_DEV, LPC_FUNC)
-/* SD Controller */
-#define SD_DEV 0x14
-#define SD_FUNC 7
-#define SD_DEVID 0x7906
-#define SD_DEVFN PCI_DEVFN(SD_DEV, SD_FUNC)
-#define SOC_SD_DEV _SOC_DEV(SD_DEV, SD_FUNC)
-
#endif /* __PI_PICASSO_PCI_DEVS_H__ */
diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h
index 4392e4f099..0f72a68567 100644
--- a/src/soc/amd/picasso/include/soc/southbridge.h
+++ b/src/soc/amd/picasso/include/soc/southbridge.h
@@ -303,9 +303,7 @@ typedef struct aoac_devs {
unsigned int ut1e:1; /* 12: UART1 */
unsigned int :2;
unsigned int st_e:1; /* 15: SATA */
- unsigned int :8;
- unsigned int sd_e:1; /* 24: SDIO */
- unsigned int :2;
+ unsigned int :11;
unsigned int espi:1; /* 27: ESPI */
unsigned int :4;
} __packed aoac_devs_t;