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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-09-17 11:22:31 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-10-20 16:32:53 +0000 |
| commit | 5f3c46579e425f40d7a063153787900777545853 (patch) | |
| tree | 0ad519541811f387247840982677f624da7190ea /src/soc/amd/picasso/southbridge.c | |
| parent | 39a4ac1502b658d4ef6b57c50a0e386eff91364a (diff) | |
| download | coreboot-5f3c46579e425f40d7a063153787900777545853.tar.xz | |
soc/amd/picasso: Remove SATA from AOAC registers
SATA is no longer defined in AOAC so remove its definitions.
Change-Id: Ief0ab6b5f69f2d17c11d8e2ee40941ac56c077f6
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36112
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/picasso/southbridge.c')
| -rw-r--r-- | src/soc/amd/picasso/southbridge.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/soc/amd/picasso/southbridge.c b/src/soc/amd/picasso/southbridge.c index ec7b76f749..92067286a9 100644 --- a/src/soc/amd/picasso/southbridge.c +++ b/src/soc/amd/picasso/southbridge.c @@ -454,8 +454,6 @@ void southbridge_init(void *chip_info) static void set_sb_final_nvs(void) { - const struct device *sata; - struct global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); if (gnvs == NULL) return; @@ -465,9 +463,6 @@ static void set_sb_final_nvs(void) gnvs->aoac.ic4e = is_aoac_device_enabled(FCH_AOAC_DEV_I2C4); gnvs->aoac.ut0e = is_aoac_device_enabled(FCH_AOAC_DEV_UART0); gnvs->aoac.ut1e = is_aoac_device_enabled(FCH_AOAC_DEV_UART1); - /* Rely on these being in sync with devicetree */ - sata = pcidev_path_on_root(SATA_DEVFN); - gnvs->aoac.st_e = sata && sata->enabled ? 1 : 0; gnvs->aoac.espi = 1; } |