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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-05 15:10:18 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-08 04:53:18 +0000
commit14222d86785d89415c014dab294205fd186b7084 (patch)
tree8760046ac6e86fc86b3d570a2e7281dc6e42fafd /src/soc/amd/picasso
parent9970b61ad3049d87650cd7b4eb5f47d667098186 (diff)
downloadcoreboot-14222d86785d89415c014dab294205fd186b7084.tar.xz
arch/x86: Change smm_subregion() prototype
Do this to avoid some amount of explicit typecasting that would be required otherwise. Change-Id: I5bc2c3c1dd579f7c6c3d3354c0691e4ba3c778e1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34706 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/amd/picasso')
-rw-r--r--src/soc/amd/picasso/cpu.c8
-rw-r--r--src/soc/amd/picasso/ramtop.c10
-rw-r--r--src/soc/amd/picasso/romstage.c6
3 files changed, 10 insertions, 14 deletions
diff --git a/src/soc/amd/picasso/cpu.c b/src/soc/amd/picasso/cpu.c
index c1d2aff129..5c2ca432f1 100644
--- a/src/soc/amd/picasso/cpu.c
+++ b/src/soc/amd/picasso/cpu.c
@@ -63,21 +63,21 @@ static int get_cpu_count(void)
static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
size_t *smm_save_state_size)
{
- void *smm_base;
+ uintptr_t smm_base;
size_t smm_size;
- void *handler_base;
+ uintptr_t handler_base;
size_t handler_size;
/* Initialize global tracking state. */
smm_region(&smm_base, &smm_size);
smm_subregion(SMM_SUBREGION_HANDLER, &handler_base, &handler_size);
- relo_attrs.smbase = (uint32_t)smm_base;
+ relo_attrs.smbase = smm_base;
relo_attrs.tseg_base = relo_attrs.smbase;
relo_attrs.tseg_mask = ALIGN_DOWN(~(smm_size - 1), 128 * KiB);
relo_attrs.tseg_mask |= SMM_TSEG_WB;
- *perm_smbase = (uintptr_t)handler_base;
+ *perm_smbase = handler_base;
*perm_smsize = handler_size;
*smm_save_state_size = sizeof(amd64_smm_state_save_area_t);
}
diff --git a/src/soc/amd/picasso/ramtop.c b/src/soc/amd/picasso/ramtop.c
index f0051e4bfe..344b7f7cc5 100644
--- a/src/soc/amd/picasso/ramtop.c
+++ b/src/soc/amd/picasso/ramtop.c
@@ -81,9 +81,9 @@ static size_t smm_region_size(void)
return CONFIG_SMM_TSEG_SIZE;
}
-void smm_region(void **start, size_t *size)
+void smm_region(uintptr_t *start, size_t *size)
{
- *start = (void *)smm_region_start();
+ *start = smm_region_start();
*size = smm_region_size();
}
@@ -109,15 +109,13 @@ static void clear_tvalid(void)
wrmsr(SMM_MASK_MSR, mask);
}
-int smm_subregion(int sub, void **start, size_t *size)
+int smm_subregion(int sub, uintptr_t *start, size_t *size)
{
uintptr_t sub_base;
size_t sub_size;
const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
- sub_base = smm_region_start();
- sub_size = smm_region_size();
-
+ smm_region(&sub_base, &sub_size);
assert(sub_size > CONFIG_SMM_RESERVED_SIZE);
switch (sub) {
diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c
index 64c18d28ee..dae64cc420 100644
--- a/src/soc/amd/picasso/romstage.c
+++ b/src/soc/amd/picasso/romstage.c
@@ -43,9 +43,8 @@ asmlinkage void car_stage_entry(void)
{
struct postcar_frame pcf;
uintptr_t top_of_ram;
- void *smm_base;
+ uintptr_t smm_base;
size_t smm_size;
- uintptr_t tseg_base;
int s3_resume = acpi_s3_resume_allowed() && acpi_is_wakeup_s3();
console_init();
@@ -92,8 +91,7 @@ asmlinkage void car_stage_entry(void)
* region for other purposes.
*/
smm_region(&smm_base, &smm_size);
- tseg_base = (uintptr_t)smm_base;
- postcar_frame_add_mtrr(&pcf, tseg_base, smm_size, MTRR_TYPE_WRBACK);
+ postcar_frame_add_mtrr(&pcf, smm_base, smm_size, MTRR_TYPE_WRBACK);
post_code(0x45);
run_postcar_phase(&pcf);