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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-09-06 14:59:45 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-09-26 16:40:11 +0000 |
| commit | 29f1b747954784a7b133e9db79382d8d466a7f3a (patch) | |
| tree | d5e6a2783282f5aa35585cbeb4842d5bcf058028 /src/soc/amd/stoneyridge/Kconfig | |
| parent | c8050f4bfcb781dbaf565684b21a4e04b1dc769e (diff) | |
| download | coreboot-29f1b747954784a7b133e9db79382d8d466a7f3a.tar.xz | |
amd/stoneyridge: Simplify memory hole calculation
Delete the obselete Kconfig symbols regarding the memory hole. Integrate
the hole check into domain_set_resources(). The hardware configuration
is done by AGESA, so only discover the setting and adjust the mmio_basek
accordingly.
BUG=b:66202887
TEST=Check settings with HDT
Change-Id: Id15a88897e29bff28ab7c498dc4d3818834f08b2
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/21496
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/Kconfig')
| -rw-r--r-- | src/soc/amd/stoneyridge/Kconfig | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index f8768e7ea7..1e13cc0383 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -110,14 +110,6 @@ config BOTTOMIO_POSITION option is useful when PCI peripherals requesting large address ranges are present. -config HW_MEM_HOLE_SIZEK - hex - default 0x200000 - -config HW_MEM_HOLE_SIZE_AUTO_INC - bool - default n - config MMCONF_BASE_ADDRESS hex default 0xF8000000 |