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authorMarshall Dawson <marshalldawson3rd@gmail.com>2017-06-27 18:40:09 -0600
committerMartin Roth <martinroth@google.com>2017-07-27 21:31:26 +0000
commitb14e04bd7c492a551532dc3678a1cc922b3cedf8 (patch)
treeee14c76b3c2b5c9b324179a24e6d74bd6d4e1b0f /src/soc/amd/stoneyridge/Makefile.inc
parente7557ded6998b334e3070a00a54a1989981d37b5 (diff)
downloadcoreboot-b14e04bd7c492a551532dc3678a1cc922b3cedf8.tar.xz
soc/amd/stoneyridge: Remove unused SD controller
Remove the unused support code from the old multi-device hudson SD controller. The binaryPI blob contains the correct steps for setting up SD and the public BKDG doesn't completely document the controller. The sd.c file was using device IDs not associated with the Stoney Ridge APU. The hudson_enable() code removed was also looking for incorrect device IDs and the PM_MANUAL_RESET register doesn't behave as the source indicates. The SD default settings may be overridden. Future improvements may include a few Kconfig options and a weak call to the mainboard for overriding additional defaults. BUG=chrome-os-partner:62580062 Change-Id: I7dbd70320740e8a05e6bf16af125d67012f20674 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/20401 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/Makefile.inc')
-rw-r--r--src/soc/amd/stoneyridge/Makefile.inc1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc
index ca9df7f74c..416d4bdacf 100644
--- a/src/soc/amd/stoneyridge/Makefile.inc
+++ b/src/soc/amd/stoneyridge/Makefile.inc
@@ -72,7 +72,6 @@ ramstage-y += model_15_init.c
ramstage-y += northbridge.c
ramstage-y += reset.c
ramstage-y += sata.c
-ramstage-y += sd.c
ramstage-y += sm.c
ramstage-y += smbus.c
ramstage-y += ramtop.c