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author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-11-08 22:18:38 -0700 |
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committer | Martin Roth <martinroth@google.com> | 2017-11-17 17:39:25 +0000 |
commit | 918c8717b2ce70065750119bc26678476d661154 (patch) | |
tree | 28e84977d88f55295c5df2b9c9a4dfb6d486df3e /src/soc/amd/stoneyridge/Makefile.inc | |
parent | 6d941bad78b0f577efe9bc6dd158be8f793950bc (diff) | |
download | coreboot-918c8717b2ce70065750119bc26678476d661154.tar.xz |
amd/stoneyridge: Add SPI controller driver
Add more definitions for the controller registers and fields. Add
source that is adapted from hudson and updated for Stoney Ridge.
This was tested with follow-on patches that write S3 data to flash.
BUG=b:68992021
Change-Id: I61d64cfdb4fce11c068113680da7ba6a199d6893
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/22408
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/Makefile.inc')
-rw-r--r-- | src/soc/amd/stoneyridge/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 197145aee4..f2a9d8d4f5 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -91,12 +91,14 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c ramstage-$(CONFIG_STONEYRIDGE_UART) += uart.c ramstage-y += usb.c ramstage-y += tsc_freq.c +ramstage-$(CONFIG_SPI_FLASH) += spi.c smm-y += smihandler.c smm-y += smi_util.c smm-y += sb_util.c smm-y += tsc_freq.c smm-$(CONFIG_DEBUG_SMI) += uart.c +smm-$(CONFIG_SPI_FLASH) += spi.c CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge/include |