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author | Felix Held <felix.held@amd.corp-partner.google.com> | 2020-03-31 23:54:44 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2020-04-02 16:07:50 +0000 |
commit | dba3229b90c7762e9f101cdcd036ca48c76f56bf (patch) | |
tree | 35c66ce3a463d21c211d7bd549dbbb4e81af4ff7 /src/soc/amd/stoneyridge/Makefile.inc | |
parent | 737e56aa56e5dce6c682580f8e89b80a0119107f (diff) | |
download | coreboot-dba3229b90c7762e9f101cdcd036ca48c76f56bf.tar.xz |
soc/amd/common/psp: Move early init to soc
The initialization code in common//psp is very specific to Family 15h.
Move this to the stoneyridge directory.
BUG=b:130660285
TEST: Verify PSP functionality on google/grunt
Change-Id: Ice3d06d6437f59a529c26fc2359565c940d39482
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://chromium-review.googlesource.com/2020365
Reviewed-by: Eric Peers <epeers@google.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40000
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/amd/stoneyridge/Makefile.inc')
-rw-r--r-- | src/soc/amd/stoneyridge/Makefile.inc | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 96b8303a1c..50e53c4c35 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -59,6 +59,7 @@ romstage-$(CONFIG_STONEYRIDGE_UART) += uart.c romstage-y += tsc_freq.c romstage-y += southbridge.c romstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c +romstage-y += psp.c verstage-y += gpio.c verstage-y += i2c.c @@ -93,6 +94,7 @@ ramstage-$(CONFIG_STONEYRIDGE_UART) += uart.c ramstage-y += usb.c ramstage-y += tsc_freq.c ramstage-y += finalize.c +ramstage-y += psp.c all-y += reset.c @@ -102,6 +104,7 @@ smm-y += smi_util.c smm-y += tsc_freq.c smm-$(CONFIG_DEBUG_SMI) += uart.c smm-y += gpio.c +smm-y += psp.c CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge/include |