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authorMarshall Dawson <marshalldawson3rd@gmail.com>2019-05-01 16:14:42 -0600
committerMartin Roth <martinroth@google.com>2019-05-08 13:48:31 +0000
commit5de4771360c0e57bd76bc81850298091e0b9bde7 (patch)
tree52d921e282de61c13f662d27165bd7a846414ed8 /src/soc/amd/stoneyridge/acpi
parentfe80bf2fd1e4f027d68af1c5bc58a8b1344a806d (diff)
downloadcoreboot-5de4771360c0e57bd76bc81850298091e0b9bde7.tar.xz
soc/amd/stoneyridge: Rename AcpiMmio blocks
A subsequent patch will move the AcpiMmio support into amd/common. Take this opportunity to rename the blocks in the 0xfed8xxxx region with more consistency. Change-Id: I9a69a6ecfc10f78b4860df05a77a061d2fc8be7d Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32642 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/acpi')
-rw-r--r--src/soc/amd/stoneyridge/acpi/gpio_lib.asl2
-rw-r--r--src/soc/amd/stoneyridge/acpi/sb_fch.asl2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/stoneyridge/acpi/gpio_lib.asl b/src/soc/amd/stoneyridge/acpi/gpio_lib.asl
index d18b147d71..8185c35ac5 100644
--- a/src/soc/amd/stoneyridge/acpi/gpio_lib.asl
+++ b/src/soc/amd/stoneyridge/acpi/gpio_lib.asl
@@ -19,7 +19,7 @@
Method (GPAD, 0x1)
{
/* Arg0 - GPIO pin number */
- Return (Add(Multiply(Arg0, 4), GPIO_CONTROL_MMIO_BASE))
+ Return (Add(Multiply(Arg0, 4), ACPIMMIO_GPIO0_BASE))
}
/* Read pin control dword */
diff --git a/src/soc/amd/stoneyridge/acpi/sb_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_fch.asl
index 114401e24b..4c1196dad6 100644
--- a/src/soc/amd/stoneyridge/acpi/sb_fch.asl
+++ b/src/soc/amd/stoneyridge/acpi/sb_fch.asl
@@ -144,7 +144,7 @@ Device (MISC)
Name (_HID, "AMD0040")
Name (_UID, 0x3)
Name (_CRS, ResourceTemplate() {
- Memory32Fixed(ReadWrite, MISC_MMIO_BASE, 0x100)
+ Memory32Fixed(ReadWrite, ACPIMMIO_MISC_BASE, 0x100)
})
Method (_STA, 0x0, NotSerialized)
{