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authorPatrick Georgi <pgeorgi@google.com>2020-05-10 16:41:01 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-05-11 17:11:40 +0000
commit6b5bc77c9b22c398262ff3f4dae3e14904c57366 (patch)
treeab40c703d92f906f8604635f091f809b59233efa /src/soc/amd/stoneyridge/acpi
parenta83c6bc907b8ef77935ba62789bc4ed60716986d (diff)
downloadcoreboot-6b5bc77c9b22c398262ff3f4dae3e14904c57366.tar.xz
treewide: Remove "this file is part of" lines
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/acpi')
-rw-r--r--src/soc/amd/stoneyridge/acpi/acpi_wake_source.asl1
-rw-r--r--src/soc/amd/stoneyridge/acpi/cpu.asl1
-rw-r--r--src/soc/amd/stoneyridge/acpi/globalnvs.asl1
-rw-r--r--src/soc/amd/stoneyridge/acpi/northbridge.asl1
-rw-r--r--src/soc/amd/stoneyridge/acpi/pci_int.asl1
-rw-r--r--src/soc/amd/stoneyridge/acpi/pcie.asl1
-rw-r--r--src/soc/amd/stoneyridge/acpi/sb_fch.asl1
-rw-r--r--src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl1
-rw-r--r--src/soc/amd/stoneyridge/acpi/sleepstates.asl1
-rw-r--r--src/soc/amd/stoneyridge/acpi/soc.asl1
-rw-r--r--src/soc/amd/stoneyridge/acpi/usb.asl1
11 files changed, 0 insertions, 11 deletions
diff --git a/src/soc/amd/stoneyridge/acpi/acpi_wake_source.asl b/src/soc/amd/stoneyridge/acpi/acpi_wake_source.asl
index 9dadcdaf45..e847884073 100644
--- a/src/soc/amd/stoneyridge/acpi/acpi_wake_source.asl
+++ b/src/soc/amd/stoneyridge/acpi/acpi_wake_source.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
Scope (\_SB)
{
diff --git a/src/soc/amd/stoneyridge/acpi/cpu.asl b/src/soc/amd/stoneyridge/acpi/cpu.asl
index fb714f8de6..b2322eac6f 100644
--- a/src/soc/amd/stoneyridge/acpi/cpu.asl
+++ b/src/soc/amd/stoneyridge/acpi/cpu.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* Required function by EC, Notify OS to re-read CPU tables */
Method (PNOT)
diff --git a/src/soc/amd/stoneyridge/acpi/globalnvs.asl b/src/soc/amd/stoneyridge/acpi/globalnvs.asl
index 5c4f390680..2865352506 100644
--- a/src/soc/amd/stoneyridge/acpi/globalnvs.asl
+++ b/src/soc/amd/stoneyridge/acpi/globalnvs.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
-/* This file is part of the coreboot project. */
/*
* NOTE: The layout of the GNVS structure below must match the layout in
diff --git a/src/soc/amd/stoneyridge/acpi/northbridge.asl b/src/soc/amd/stoneyridge/acpi/northbridge.asl
index 91e43aa5d6..5a052e70c5 100644
--- a/src/soc/amd/stoneyridge/acpi/northbridge.asl
+++ b/src/soc/amd/stoneyridge/acpi/northbridge.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* Note: Only need HID on Primary Bus */
External (TOM1)
diff --git a/src/soc/amd/stoneyridge/acpi/pci_int.asl b/src/soc/amd/stoneyridge/acpi/pci_int.asl
index 8f49751fc9..0f3d882a8b 100644
--- a/src/soc/amd/stoneyridge/acpi/pci_int.asl
+++ b/src/soc/amd/stoneyridge/acpi/pci_int.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* PCIe Configuration Space for CONFIG_MMCONF_BUS_NUMBER busses */
OperationRegion(PCFG, SystemMemory, PCBA, PCLN) /* Each bus consumes 1MB */
diff --git a/src/soc/amd/stoneyridge/acpi/pcie.asl b/src/soc/amd/stoneyridge/acpi/pcie.asl
index eaa4563448..ecb54b9e16 100644
--- a/src/soc/amd/stoneyridge/acpi/pcie.asl
+++ b/src/soc/amd/stoneyridge/acpi/pcie.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* PCI IRQ mapping registers, C00h-C01h. */
OperationRegion(PRQM, SystemIO, 0x00000c00, 0x00000002)
diff --git a/src/soc/amd/stoneyridge/acpi/sb_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_fch.asl
index 3057b8d955..28e29c6e25 100644
--- a/src/soc/amd/stoneyridge/acpi/sb_fch.asl
+++ b/src/soc/amd/stoneyridge/acpi/sb_fch.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <soc/gpio.h>
#include <soc/iomap.h>
diff --git a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
index cfd2f1df7b..64e87486cb 100644
--- a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
+++ b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
External(\_SB.ALIB, MethodObj)
diff --git a/src/soc/amd/stoneyridge/acpi/sleepstates.asl b/src/soc/amd/stoneyridge/acpi/sleepstates.asl
index 9f4d999a41..88c6efc960 100644
--- a/src/soc/amd/stoneyridge/acpi/sleepstates.asl
+++ b/src/soc/amd/stoneyridge/acpi/sleepstates.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
Name(SSFG, 0x09)
diff --git a/src/soc/amd/stoneyridge/acpi/soc.asl b/src/soc/amd/stoneyridge/acpi/soc.asl
index 790f89bdd8..b411c20ba4 100644
--- a/src/soc/amd/stoneyridge/acpi/soc.asl
+++ b/src/soc/amd/stoneyridge/acpi/soc.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
Device(PCI0) {
/* Describe the AMD Northbridge */
diff --git a/src/soc/amd/stoneyridge/acpi/usb.asl b/src/soc/amd/stoneyridge/acpi/usb.asl
index 95c607b23c..3c62b331d2 100644
--- a/src/soc/amd/stoneyridge/acpi/usb.asl
+++ b/src/soc/amd/stoneyridge/acpi/usb.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* 0:12.0 - EHCI */
Device(EHC0) {