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authorMarshall Dawson <marshalldawson3rd@gmail.com>2017-11-02 09:49:30 -0600
committerAaron Durbin <adurbin@chromium.org>2017-11-08 19:24:49 +0000
commit154239aff1602e0ae27f9ce1f2df0647e4aef0a8 (patch)
tree3c1a87b65602296502b59c4d3c67fcb76b8a2e25 /src/soc/amd/stoneyridge/bootblock
parent22bb2bee60a3a8532246026526a8f4b880341f74 (diff)
downloadcoreboot-154239aff1602e0ae27f9ce1f2df0647e4aef0a8.tar.xz
amd/stoneyridge: Remove fixme.c
Move the two functions in fixme.c to places where they make more sense. Coincidentally fix the todo in amd_initcpuio() and use bsp_topmem() instead of explicitely reading the MSR. BUG=b:62241048 Change-Id: Ica80b92f48788314ad290ccf72e6847fb6d039c3 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/22297 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/bootblock')
-rw-r--r--src/soc/amd/stoneyridge/bootblock/bootblock.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/bootblock/bootblock.c b/src/soc/amd/stoneyridge/bootblock/bootblock.c
index 1712b5159a..461f32dbff 100644
--- a/src/soc/amd/stoneyridge/bootblock/bootblock.c
+++ b/src/soc/amd/stoneyridge/bootblock/bootblock.c
@@ -17,6 +17,9 @@
#include <stdint.h>
#include <assert.h>
#include <console/console.h>
+#include <cpu/x86/msr.h>
+#include <cpu/x86/mtrr.h>
+#include <cpu/amd/amdfam15.h>
#include <smp/node.h>
#include <bootblock_common.h>
#include <agesawrapper.h>
@@ -37,6 +40,26 @@ asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
bootblock_main_with_timestamp(base_timestamp);
}
+/* Set the MMIO Configuration Base Address and Bus Range. */
+static void amd_initmmio(void)
+{
+ msr_t mmconf;
+ msr_t mtrr_cap = rdmsr(MTRR_CAP_MSR);
+ int mtrr;
+
+ mmconf.hi = 0;
+ mmconf.lo = CONFIG_MMCONF_BASE_ADDRESS | MMIO_RANGE_EN
+ | fms(CONFIG_MMCONF_BUS_NUMBER) << MMIO_BUS_RANGE_SHIFT;
+ wrmsr(MMIO_CONF_BASE, mmconf);
+
+ /*
+ * todo: AGESA currently writes variable MTRRs. Once that is
+ * corrected, un-hardcode this MTRR.
+ */
+ mtrr = (mtrr_cap.lo & MTRR_CAP_VCNT) - 2;
+ set_var_mtrr(mtrr, FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT);
+}
+
void bootblock_soc_early_init(void)
{
amd_initmmio();