diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-06-15 12:17:38 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-27 20:50:54 +0000 |
| commit | 4e101ada37c10282030729f4a03fd505bd4f526d (patch) | |
| tree | 7cdb6f41b198ef1e9c30f66da854572893de91ed /src/soc/amd/stoneyridge/dimmSpd.c | |
| parent | 4692e2fc95605a997cd9cd1cdb711e6c1f6869bc (diff) | |
| download | coreboot-4e101ada37c10282030729f4a03fd505bd4f526d.tar.xz | |
soc/amd/stoneyridge: Fix most checkpatch errors
Correct the majority of reported errors and mark most of the
remaining ones as todo. (Some of the lines requiring a >80
break are indented too much currently.) Some of the alignment
in hudson.h still causes checkpatch errors, but this is
intentionally left as-is.
Also make other misc. changes, e.g. consistency in lower-case
for hex values, using defined values, etc.
These changes were confirmed to cause no changes in a Gardenia
build. No other improvements were made, e.g. changing to helper
functions, or converting functions like __outbyte().
BUG=chrome-os-partner:622407746
Change-Id: I768884a4c4b9505e77f5d6bfde37797520878912
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/19986
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/dimmSpd.c')
| -rw-r--r-- | src/soc/amd/stoneyridge/dimmSpd.c | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/src/soc/amd/stoneyridge/dimmSpd.c b/src/soc/amd/stoneyridge/dimmSpd.c index 9772809293..a69b80c69f 100644 --- a/src/soc/amd/stoneyridge/dimmSpd.c +++ b/src/soc/amd/stoneyridge/dimmSpd.c @@ -24,25 +24,26 @@ #include "chip.h" #include <dimmSpd.h> -AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINTN unused2, AGESA_READ_SPD_PARAMS *info) +AGESA_STATUS AmdMemoryReadSPD(UINT32 unused1, UINTN unused2, + AGESA_READ_SPD_PARAMS *info) { int spdAddress; DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); - DEVTREE_CONST struct soc_amd_stoneyridge_config *config = dev->chip_info; + DEVTREE_CONST struct soc_amd_stoneyridge_config *conf = dev->chip_info; - if ((dev == 0) || (config == 0)) + if ((dev == 0) || (conf == 0)) return AGESA_ERROR; - if (info->SocketId >= ARRAY_SIZE(config->spdAddrLookup)) + if (info->SocketId >= ARRAY_SIZE(conf->spdAddrLookup)) return AGESA_ERROR; - if (info->MemChannelId >= ARRAY_SIZE(config->spdAddrLookup[0])) + if (info->MemChannelId >= ARRAY_SIZE(conf->spdAddrLookup[0])) return AGESA_ERROR; - if (info->DimmId >= ARRAY_SIZE(config->spdAddrLookup[0][0])) + if (info->DimmId >= ARRAY_SIZE(conf->spdAddrLookup[0][0])) return AGESA_ERROR; - spdAddress = config->spdAddrLookup - [info->SocketId] [info->MemChannelId] [info->DimmId]; + spdAddress = conf->spdAddrLookup + [info->SocketId][info->MemChannelId][info->DimmId]; if (spdAddress == 0) return AGESA_ERROR; - int err = hudson_readSpd(spdAddress, (void *) info->Buffer, 128); + int err = hudson_readSpd(spdAddress, (void *)info->Buffer, 128); if (err) return AGESA_ERROR; return AGESA_SUCCESS; |