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authorMarshall Dawson <marshalldawson3rd@gmail.com>2017-08-25 15:29:45 -0600
committerMartin Roth <martinroth@google.com>2017-09-13 18:56:27 +0000
commit0801b335dd11f7827b6c0164f06d75e7a94fff1e (patch)
tree9ae7df47090af46ae1d84615294b85a12ced74e4 /src/soc/amd/stoneyridge/hda.c
parent7e464dcb85354e22e733d94ef2b3e2c77fca22dc (diff)
downloadcoreboot-0801b335dd11f7827b6c0164f06d75e7a94fff1e.tar.xz
amd/stoneyridge: Make cbmem_top SMM aware
Make the default for SMM_TSEG_SIZE depend on SMM_TSEG in addition to HAVE_SMI_HANDLER. Change the value returned by cbmem_top() to carve out a range to be used by TSEG. The SMM Mask register has a granularity of 128KB but align the value to 16MB to keep down the number of variable MTRRs required. Change-Id: I54ffc10108862b7d022fbbd92bf97525b349df27 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/21491 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/hda.c')
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