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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-06-15 12:17:38 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-27 20:50:54 +0000 |
| commit | 4e101ada37c10282030729f4a03fd505bd4f526d (patch) | |
| tree | 7cdb6f41b198ef1e9c30f66da854572893de91ed /src/soc/amd/stoneyridge/imc.c | |
| parent | 4692e2fc95605a997cd9cd1cdb711e6c1f6869bc (diff) | |
| download | coreboot-4e101ada37c10282030729f4a03fd505bd4f526d.tar.xz | |
soc/amd/stoneyridge: Fix most checkpatch errors
Correct the majority of reported errors and mark most of the
remaining ones as todo. (Some of the lines requiring a >80
break are indented too much currently.) Some of the alignment
in hudson.h still causes checkpatch errors, but this is
intentionally left as-is.
Also make other misc. changes, e.g. consistency in lower-case
for hex values, using defined values, etc.
These changes were confirmed to cause no changes in a Gardenia
build. No other improvements were made, e.g. changing to helper
functions, or converting functions like __outbyte().
BUG=chrome-os-partner:622407746
Change-Id: I768884a4c4b9505e77f5d6bfde37797520878912
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/19986
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/imc.c')
| -rw-r--r-- | src/soc/amd/stoneyridge/imc.c | 27 |
1 files changed, 15 insertions, 12 deletions
diff --git a/src/soc/amd/stoneyridge/imc.c b/src/soc/amd/stoneyridge/imc.c index b4e1d9d53a..7e40a99086 100644 --- a/src/soc/amd/stoneyridge/imc.c +++ b/src/soc/amd/stoneyridge/imc.c @@ -45,13 +45,12 @@ void imc_reg_init(void) write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x13), 0xff); write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x14), 0xff); - reg8 = pci_read_config8(PCI_DEV(0, 0x18, 0x3), 0x1E4); - reg8 &= 0x8F; + reg8 = pci_read_config8(PCI_DEV(0, 0x18, 0x3), 0x1e4); + reg8 &= 0x8f; reg8 |= 0x10; - pci_write_config8(PCI_DEV(0, 0x18, 0x3), 0x1E4, reg8); + pci_write_config8(PCI_DEV(0, 0x18, 0x3), 0x1e4, reg8); } -#ifndef __PRE_RAM__ void enable_imc_thermal_zone(void) { AMD_CONFIG_PARAMS StdHeader; @@ -62,12 +61,12 @@ void enable_imc_thermal_zone(void) regs[0] = 0; regs[1] = 0; FunNum = Fun_80; - for (i = 0; i <= 1; i++) + for (i = 0 ; i <= 1 ; i++) WriteECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader); WriteECmsg(MSG_SYS_TO_IMC, AccessWidth8, &FunNum, &StdHeader); WaitForEcLDN9MailboxCmdAck(&StdHeader); - for (i = 2; i <= 9; i++) + for (i = 2 ; i <= 9 ; i++) ReadECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader); /* enable thermal zone 0 */ @@ -75,14 +74,13 @@ void enable_imc_thermal_zone(void) regs[0] = 0; regs[1] = 0; FunNum = Fun_81; - for (i = 0; i <= 9; i++) + for (i = 0 ; i <= 9 ; i++) WriteECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader); WriteECmsg(MSG_SYS_TO_IMC, AccessWidth8, &FunNum, &StdHeader); WaitForEcLDN9MailboxCmdAck(&StdHeader); } -#endif -/* Bettong Hardware Monitor Fan Control +/* Hardware Monitor Fan Control * Hardware limitation: * HWM will fail to read the input temperature via I2C if other * software switches the I2C address. AMD recommends using IMC @@ -94,8 +92,13 @@ void oem_fan_control(FCH_DATA_BLOCK *FchParams) imc_reg_init(); FchParams->Imc.ImcEnable = TRUE; - FchParams->Hwm.HwmControl = 1; /* 1 IMC, 0 HWM */ - FchParams->Imc.ImcEnableOverWrite = 1; /* 2 disable IMC, 1 enable IMC, 0 following hw strap setting */ - LibAmdMemFill(&(FchParams->Imc.EcStruct), 0, sizeof(FCH_EC), FchParams->StdHeader); + /* 1 IMC, 0 HWM */ + FchParams->Hwm.HwmControl = 1; + + /* 2 disable IMC, 1 enable IMC, 0 following hw strap setting */ + FchParams->Imc.ImcEnableOverWrite = 1; + + LibAmdMemFill(&(FchParams->Imc.EcStruct), 0, sizeof(FCH_EC), + FchParams->StdHeader); } |