diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2018-10-05 15:54:31 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-10-12 15:14:35 +0000 |
| commit | 1548458efd6b6065ea39524936afcbb7663ff33f (patch) | |
| tree | 2d9bf26138d8ddf51825e9751c30f21d477a4b26 /src/soc/amd/stoneyridge/include | |
| parent | ecce847606e18aace9fde5f925a7a3a6a85181ee (diff) | |
| download | coreboot-1548458efd6b6065ea39524936afcbb7663ff33f.tar.xz | |
amd/stoneyridge: Fix SPI_CMD_TRIGGER coding style
Make the whitespace match surrounding lines and remove unnecessary
parentheses.
Change-Id: I2ed02494ba69237c38af61317e435d9575cefe1c
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/29010
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index c50733be76..d4af8a1554 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -229,8 +229,8 @@ #define EXEC_OPCODE BIT(16) #define SPI_CNTRL1 0x0c #define SPI_CMD_CODE 0x45 -#define SPI_CMD_TRIGGER 0x47 -#define SPI_CMD_TRIGGER_EXECUTE (BIT(7)) +#define SPI_CMD_TRIGGER 0x47 +#define SPI_CMD_TRIGGER_EXECUTE BIT(7) #define SPI_TX_BYTE_COUNT 0x48 #define SPI_RX_BYTE_COUNT 0x4b #define SPI_STATUS 0x4c |