diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2020-12-08 02:07:18 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-12-09 02:11:53 +0000 |
| commit | 37609852f7955bd2496a3555d215c03d2c145938 (patch) | |
| tree | 79134f1a6dd07b64ccaee026516bd70481d92c05 /src/soc/amd/stoneyridge/include | |
| parent | 20a4874445dfc52b4721b01246d86e1114165b1b (diff) | |
| download | coreboot-37609852f7955bd2496a3555d215c03d2c145938.tar.xz | |
soc/amd: factor out functionality to print last reset source
Change-Id: I5cec38dac7ea27aa316f5dd4f91ed84627a0f937
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48437
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index a4f43ec112..c627f7ec7c 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -72,7 +72,6 @@ #define PM_ACPI_RTC_WAKE_EN BIT(29) #define PM_RST_CTRL1 0xbe #define SLPTYPE_CONTROL_EN BIT(5) -#define PM_RST_STATUS 0xc0 #define PM_PCIB_CFG 0xea #define PM_GENINT_DISABLE BIT(0) #define PM_LPC_GATING 0xec |