diff options
| author | Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> | 2018-06-19 07:40:18 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-06-26 15:20:29 +0000 |
| commit | ef73cb88dc52dbe9ea5cc23939e109e0a7967e89 (patch) | |
| tree | 5b92d5306d41e96db11d62344298fa4de2993c72 /src/soc/amd/stoneyridge/include | |
| parent | 8fb9f23d510fa6cb123936dd8076538175315d91 (diff) | |
| download | coreboot-ef73cb88dc52dbe9ea5cc23939e109e0a7967e89.tar.xz | |
soc/amd/stoneyridge/southbridge.c: Fix get_index_bit limit check
Limit is the maximum number of bits to be tested, however it's being checked
against the number of bytes of uint32_t. when it should be number of bits.
Create a macro to provide the number of bits, and use it instead of sizeof.
BUG=b:75996437
TEST=Add debug messages to see code passing beyond the check, build and
boot grunt, check that it passed the limit check, remove debug code.
Change-Id: Id1dfda26d789183b346b20c37fec923d996b80db
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/27162
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 3e70c32c25..06ef898ca5 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -355,6 +355,7 @@ #define PM1_LIMIT 16 #define GPE0_LIMIT 28 +#define TOTAL_BITS(a) (8 * sizeof(a)) /* Bit definitions for MISC_MMIO_BASE register GPPClkCntrl */ #define GPP_CLK_CNTRL 0 |