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authorMichał Żygowski <michal.zygowski@3mdeb.com>2019-12-02 17:02:00 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-12-04 12:28:16 +0000
commit5a6620277d6232a0d222047cbd7db414fb8585bc (patch)
tree69e63c9ccd4a4af1f058091a5a3dae02ae485e1a /src/soc/amd/stoneyridge/include
parentf65c1e40885377a07794fc59f38fce1c9230854f (diff)
downloadcoreboot-5a6620277d6232a0d222047cbd7db414fb8585bc.tar.xz
amdblocks/acpimmio: add common functions for AP entry
Move the stoneyridge implementation of get/set AP entry to the common block. Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I9c73940ffe5f735dcd844911361355c384f617b1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/37416 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
-rw-r--r--src/soc/amd/stoneyridge/include/soc/northbridge.h6
1 files changed, 0 insertions, 6 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/northbridge.h b/src/soc/amd/stoneyridge/include/soc/northbridge.h
index a0d7ce88dd..5694779fb5 100644
--- a/src/soc/amd/stoneyridge/include/soc/northbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/northbridge.h
@@ -40,8 +40,6 @@
#define NB_IOAPIC_SCRATCH0 0x3e
#define NB_IOAPIC_SCRATCH1 0x3f
-#define AP_SCRATCH_REG NB_IOAPIC_SCRATCH0
-
/* D1F1 - HDA Configuration Registers */
#define HDA_DEV_CTRL_STATUS 0x60
#define HDA_NO_SNOOP_EN BIT(11)
@@ -102,10 +100,6 @@
void domain_enable_resources(struct device *dev);
void domain_set_resources(struct device *dev);
void fam15_finalize(void *chip_info);
-uint32_t nb_ioapic_read(unsigned int index);
-void nb_ioapic_write(unsigned int index, uint32_t value);
-void *get_ap_entry_ptr(void);
-void set_ap_entry_ptr(void *entry);
void set_warm_reset_flag(void);
int is_warm_reset(void);