summaryrefslogtreecommitdiff
path: root/src/soc/amd/stoneyridge/include
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2018-12-12 15:12:43 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-12-19 05:20:49 +0000
commit6e0044dbf285eaf546c7f0db0d6a9fff6c2d30fb (patch)
treecbe01fd714620c54693dd1cc40060cd67980a8e5 /src/soc/amd/stoneyridge/include
parentae75400ae338180da9a75526b017042a1780c4f9 (diff)
downloadcoreboot-6e0044dbf285eaf546c7f0db0d6a9fff6c2d30fb.tar.xz
soc: Remove useless include <device/pci_ids.h>
Change-Id: Idef8c556ac8c05c5e2047a38629422544392cd62 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/30200 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 32756cd364..88aa7db874 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -19,7 +19,6 @@
#include <arch/io.h>
#include <types.h>
-#include <device/pci_ids.h>
#include <device/device.h>
#include <device/pci_def.h>
#include <soc/iomap.h>